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Searched refs:PLL4_CTRL_DIV_SEL_S (Results 1 – 1 of 1) sorted by relevance

/freebsd/sys/arm/freescale/vybrid/
H A Dvf_anadig.c99 #define PLL4_CTRL_DIV_SEL_S 0 macro
166 reg &= ~(PLL4_CTRL_DIV_SEL_M << PLL4_CTRL_DIV_SEL_S); in pll4_configure_output()
167 reg |= (mfi << PLL4_CTRL_DIV_SEL_S); in pll4_configure_output()