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Searched refs:PLL3 (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp151c-mecio1r0.dts46 assigned-clock-rates = <125000000>; /* Clock PLL3 to 625Mhz in tf-a. */
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dstm32mp13-clks.h21 #define PLL3 8 macro
H A Dstm32mp1-clks.h185 #define PLL3 178 macro
H A Dqcom,gcc-ipq806x.h231 #define PLL3 222 macro
H A Dqcom,gcc-mdm9615.h288 #define PLL3 278 macro
H A Dqcom,gcc-msm8960.h286 #define PLL3 278 macro
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_attach.c3373 #define PLL3 0x16188 macro
3382 OS_REG_WRITE(ah, PLL3, (OS_REG_READ(ah, PLL3) & ~(PLL3_DO_MEAS_MASK))); in ar9300_get_pll3_sqsum_dvc()
3384 OS_REG_WRITE(ah, PLL3, (OS_REG_READ(ah, PLL3) | PLL3_DO_MEAS_MASK)); in ar9300_get_pll3_sqsum_dvc()
3390 return (( OS_REG_READ(ah, PLL3) & SQSUM_DVC_MASK ) >> 3); in ar9300_get_pll3_sqsum_dvc()
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8960.dtsi168 <&gcc PLL3>,
H A Dqcom-apq8064.dtsi734 <&gcc PLL3>,