| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCCState.h | 52 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
57 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
74 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
104 const SmallVectorImpl<ISD::OutputArg> &Outs, CCAssignFn Fn, in PreAnalyzeCallOperands() argument
110 PreAnalyzeCallOperands(Outs, FuncArgs, Func); in PreAnalyzeCallOperands()
114 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
118 PreAnalyzeCallOperands(Outs, Fn, FuncArgs, Func); in AnalyzeCallOperands()
119 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
125 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
127 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
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| H A D | MipsCCState.cpp | 99 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128() argument
101 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForF128()
121 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForVectorFloat() argument
122 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForVectorFloat()
123 ISD::OutputArg Out = Outs[i]; in PreAnalyzeReturnForVectorFloat()
144 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands() argument
147 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeCallOperands()
148 TargetLowering::ArgListEntry FuncArg = FuncArgs[Outs[i].OrigArgIndex]; in PreAnalyzeCallOperands()
153 CallOperandIsFixed.push_back(Outs[i].IsFixed); in PreAnalyzeCallOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCCState.h | 23 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
57 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
60 IsFixed.resize(Outs.size(), false); in AnalyzeCallOperands()
61 for (unsigned ValNo = 0, E = Outs.size(); ValNo != E; ++ValNo) in AnalyzeCallOperands()
62 if (Outs[ValNo].IsFixed) in AnalyzeCallOperands()
65 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
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| H A D | PPCCCState.cpp | 17 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeCallOperands() argument
18 for (const auto &I : Outs) { in PreAnalyzeCallOperands()
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| H A D | PPCISelLowering.h | 1252 const SmallVectorImpl<ISD::OutputArg> &Outs,
1259 const SmallVectorImpl<ISD::OutputArg> &Outs,
1367 const SmallVectorImpl<ISD::OutputArg> &Outs,
1371 const SmallVectorImpl<ISD::OutputArg> &Outs,
1398 const SmallVectorImpl<ISD::OutputArg> &Outs,
1405 const SmallVectorImpl<ISD::OutputArg> &Outs,
1412 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 99 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
102 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in CheckReturn()
103 MVT VT = Outs[i].VT; in CheckReturn()
104 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn()
113 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
116 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in AnalyzeReturn()
117 MVT VT = Outs[i].VT; in AnalyzeReturn()
118 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn()
126 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
128 unsigned NumOps = Outs.size(); in AnalyzeCallOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCallingConv.h | 65 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
69 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
70 ArgIsFixed.push_back(Outs[i].IsFixed); in AnalyzeCallOperands()
73 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
74 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT)); in AnalyzeCallOperands()
76 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
81 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.h | 155 const SmallVectorImpl<ISD::OutputArg> &Outs,
159 const SmallVectorImpl<ISD::OutputArg> &Outs,
164 const SmallVectorImpl<ISD::OutputArg> &Outs,
169 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.h | 95 const SmallVectorImpl<ISD::OutputArg> &Outs,
121 const SmallVectorImpl<ISD::OutputArg> &Outs,
149 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| H A D | LanaiISelLowering.cpp | 411 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
426 return LowerCCCCallTo(Chain, Callee, CallConv, IsVarArg, IsTailCall, Outs, in LowerCall()
532 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn() argument
536 return CCInfo.CheckReturn(Outs, RetCC_Lanai32); in CanLowerReturn()
542 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
553 CCInfo.AnalyzeReturn(Outs, RetCC_Lanai32); in LowerReturn()
604 bool /*IsTailCall*/, const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCCCCallTo() argument
622 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32_VarArg); in LowerCCCCallTo()
625 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32_Fast); in LowerCCCCallTo()
627 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32); in LowerCCCCallTo()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 273 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
279 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
284 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
294 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments() argument
296 AnalyzeCallOperands(Outs, Fn); in AnalyzeArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.h | 143 const SmallVectorImpl<ISD::OutputArg> &Outs,
173 const SmallVectorImpl<ISD::OutputArg> &Outs,
177 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| H A D | MSP430ISelLowering.cpp | 442 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeVarArgs() argument
443 State.AnalyzeCallOperands(Outs, CC_MSP430_AssignStack); in AnalyzeVarArgs()
556 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeRetResult() argument
557 State.AnalyzeReturn(Outs, RetCC_MSP430); in AnalyzeRetResult()
590 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
609 Outs, OutVals, Ins, dl, DAG, InVals); in LowerCall()
727 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn() argument
731 return CCInfo.CheckReturn(Outs, RetCC_MSP430); in CanLowerReturn()
737 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
747 if (CallConv == CallingConv::MSP430_INTR && !Outs.empty()) in LowerReturn()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.h | 77 const SmallVectorImpl<ISD::OutputArg> &Outs,
81 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| H A D | XtensaISelLowering.cpp | 299 SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs; in LowerCall() local
321 CCInfo.AnalyzeCallOperands(Outs, CC); in LowerCall()
338 ISD::ArgFlagsTy Flags = Outs[I].Flags; in LowerCall()
473 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn() argument
476 return CCInfo.CheckReturn(Outs, RetCC_Xtensa); in CanLowerReturn()
482 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
493 RetCCInfo.AnalyzeReturn(Outs, RetCC_Xtensa); in LowerReturn()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 663 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn() argument
666 return CCInfo.CheckReturn(Outs, RetCC_X86); in CanLowerReturn()
737 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
750 if (CallConv == CallingConv::X86_INTR && !Outs.empty()) in LowerReturn()
755 CCInfo.AnalyzeReturn(Outs, RetCC_X86); in LowerReturn()
1996 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
2012 bool IsCalleePopSRet = !IsGuaranteeTCO && hasCalleePopSRet(Outs, Subtarget); in LowerCall()
2034 CCInfo.AnalyzeArguments(Outs, CC_X86); in LowerCall()
2039 CCInfo.AnalyzeArgumentsSecondPass(Outs, CC_X86); in LowerCall()
2106 if (!Outs.empty() && Outs.back().Flags.isInAlloca()) { in LowerCall()
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| H A D | X86CallLowering.h | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.h | 273 const SmallVectorImpl<ISD::OutputArg> &Outs,
279 const SmallVectorImpl<ISD::OutputArg> &Outs,
320 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.h | 177 const SmallVectorImpl<ISD::OutputArg> &Outs,
180 const SmallVectorImpl<ISD::OutputArg> &Outs,
272 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 267 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
282 CCInfo.AnalyzeCallOperands(Outs, CC_ARC); in LowerCall()
633 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn() argument
636 if (!CCInfo.CheckReturn(Outs, RetCC_ARC)) in CanLowerReturn()
646 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
664 CCInfo.AnalyzeReturn(Outs, RetCC_ARC); in LowerReturn()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CallLowering.h | 489 bool checkReturn(CCState &CCInfo, SmallVectorImpl<BaseArgInfo> &Outs,
495 SmallVectorImpl<BaseArgInfo> &Outs,
507 SmallVectorImpl<BaseArgInfo> &Outs, in canLowerReturn() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 408 auto &Outs = CLI.Outs; in LowerCall() local
433 CCInfo.AnalyzeCallOperands(Outs, getHasAlu32() ? CC_BPF32 : CC_BPF64); in LowerCall()
437 if (Outs.size() > MaxArgs) in LowerCall()
440 for (auto &Arg : Outs) { in LowerCall()
537 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
555 CCInfo.AnalyzeReturn(Outs, getHasAlu32() ? RetCC_BPF32 : RetCC_BPF64); in LowerReturn()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.h | 151 const SmallVectorImpl<ISD::OutputArg> &Outs,
213 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 174 const SmallVectorImpl<ISD::OutputArg> &Outs,
178 const SmallVectorImpl<ISD::OutputArg> &Outs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.h | 63 const SmallVectorImpl<ISD::OutputArg> &Outs,
67 const SmallVectorImpl<ISD::OutputArg> &Outs,
|