Searched refs:OutputRegs (Results 1 – 1 of 1) sorted by relevance
4971 SmallVector<SmallVector<Register, 8>, 2> OutputRegs(NumDefs); in fewerElementsVectorMultiEltType() local5009 OutputRegs[DstNo].push_back(I.getReg(DstNo)); in fewerElementsVectorMultiEltType()5015 mergeMixedSubvectors(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()5018 MIRBuilder.buildMergeLikeInstr(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()5034 SmallVector<Register, 8> OutputRegs; in fewerElementsVectorPhi() local5055 OutputRegs.push_back(Phi.getReg(0)); in fewerElementsVectorPhi()5069 mergeMixedSubvectors(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()5071 MIRBuilder.buildMergeLikeInstr(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()