Searched refs:OutputRegs (Results 1 – 1 of 1) sorted by relevance
4294 SmallVector<SmallVector<Register, 8>, 2> OutputRegs(NumDefs); in fewerElementsVectorMultiEltType() local4333 OutputRegs[DstNo].push_back(I.getReg(DstNo)); in fewerElementsVectorMultiEltType()4339 mergeMixedSubvectors(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()4342 MIRBuilder.buildMergeLikeInstr(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()4358 SmallVector<Register, 8> OutputRegs; in fewerElementsVectorPhi() local4379 OutputRegs.push_back(Phi.getReg(0)); in fewerElementsVectorPhi()4393 mergeMixedSubvectors(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()4395 MIRBuilder.buildMergeLikeInstr(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()