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Searched refs:OutRegs (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.h400 std::set<Register> &OutRegs);
474 std::set<unsigned> OutRegs; in getOutRegs() local
476 OutRegs.insert(RegMaskPair.RegUnit); in getOutRegs()
478 return OutRegs; in getOutRegs()
H A DSIMachineScheduler.cpp1460 const std::set<Register> &OutRegs = Block->getOutRegs(); in SIScheduleBlockScheduler() local
1462 if (OutRegs.find(Reg) == OutRegs.end()) in SIScheduleBlockScheduler()
1682 std::set<Register> &OutRegs) { in checkRegUsageImpact() argument
1698 for (Register Reg : OutRegs) { in checkRegUsageImpact()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DFastISel.h96 SmallVector<Register, 16> OutRegs; member
192 OutRegs.clear(); in clearOuts()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3246 auto &OutRegs = CLI.OutRegs; in fastLowerCall() local
3480 OutRegs.push_back(VA.getLocReg()); in fastLowerCall()
3609 for (auto Reg : OutRegs) in fastLowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1238 CLI.OutRegs.push_back(VA.getLocReg()); in processCallArgs()
1569 for (auto Reg : CLI.OutRegs) in fastLowerCall()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp841 unsigned NumCallRegArgs = IsAnyRegCC ? NumArgs : CLI.OutRegs.size(); in selectPatchpoint()
859 for (auto Reg : CLI.OutRegs) in selectPatchpoint()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp2379 static void ComputeRegsForAlias(unsigned Reg, SmallSet<unsigned, 8> &OutRegs, in ComputeRegsForAlias() argument
2400 OutRegs.insert(Reg); in ComputeRegsForAlias()
2404 OutRegs.insert_range(Regs); in ComputeRegsForAlias()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3067 CLI.OutRegs.push_back(VA.getLocReg()); in processCallArgs()
3275 for (auto Reg : CLI.OutRegs) in fastLowerCall()