Searched refs:OutInst (Results 1 – 4 of 4) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVBaseInfo.cpp | 141 bool RISCVRVC::compress(MCInst &OutInst, const MCInst &MI, in compress() argument 143 return compressInst(OutInst, MI, STI); in compress() 146 bool RISCVRVC::uncompress(MCInst &OutInst, const MCInst &MI, in uncompress() argument 148 return uncompressInst(OutInst, MI, STI); in uncompress()
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H A D | RISCVBaseInfo.h | 486 bool compress(MCInst &OutInst, const MCInst &MI, const MCSubtargetInfo &STI); 487 bool uncompress(MCInst &OutInst, const MCInst &MI, const MCSubtargetInfo &STI);
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVAsmPrinter.cpp | 318 MCInst OutInst; in emitInstruction() local 319 if (!lowerToMCInst(MI, OutInst)) in emitInstruction() 320 EmitToStreamer(*OutStreamer, OutInst); in emitInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.td | 10192 multiclass PromoteUnaryv8f16Tov4f32<SDPatternOperator InOp, Instruction OutInst> { 10198 (v4f32 (OutInst 10201 (v4f32 (OutInst (v4f32 (FCVTLv8i16 V128:$Rn))))))>; 10207 (v4f32 (OutInst 10209 (v4f32 (OutInst (v4f32 (SHLLv8i16 V128:$Rn))))))>; 10214 (round_v4fp32_to_v4bf16 (v4f32 (OutInst 10216 (round_v4fp32_to_v4bf16 (v4f32 (OutInst 10227 multiclass PromoteBinaryv8f16Tov4f32<SDPatternOperator InOp, Instruction OutInst> { 10233 (v4f32 (OutInst 10237 (v4f32 (OutInst (v4f32 (FCVTLv8i16 V128:$Rn)), [all …]
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