| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructions.td | 165 def brtarget : Operand<OtherVT>; 348 def COND_OEQ : PatFrags<(ops), [(OtherVT SETOEQ), (OtherVT SETEQ)]>; 349 def COND_ONE : PatFrags<(ops), [(OtherVT SETONE), (OtherVT SETNE)]>; 350 def COND_OGT : PatFrags<(ops), [(OtherVT SETOGT), (OtherVT SETGT)]>; 351 def COND_OGE : PatFrags<(ops), [(OtherVT SETOGE), (OtherVT SETGE)]>; 352 def COND_OLT : PatFrags<(ops), [(OtherVT SETOLT), (OtherVT SETLT)]>; 353 def COND_OLE : PatFrags<(ops), [(OtherVT SETOLE), (OtherVT SETLE)]>; 354 def COND_O : PatFrags<(ops), [(OtherVT SETO)]>; 355 def COND_UO : PatFrags<(ops), [(OtherVT SETUO)]>; 361 def COND_UEQ : PatFrag<(ops), (OtherVT SETUEQ)>; [all …]
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| H A D | AMDGPUInstrInfo.td | 46 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>] 50 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>] 54 [SDTCisVT<0, i1>, SDTCisVT<1, OtherVT>] 221 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT> 371 SDTCisVT<0, OtherVT>
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaOperands.td | 228 def brtarget : Operand<OtherVT> { 236 def jumptarget : Operand<OtherVT> { 244 def ltarget : Operand<OtherVT> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.td | 71 /* Dest */ SDTCisVT<0, OtherVT>, 364 def MxAS8 : MxMemOp<(ops OtherVT), MxSize8, "B", "printAS8Mem", MxAddr8>; 365 def MxAS16 : MxMemOp<(ops OtherVT), MxSize16, "B", "printAS16Mem", MxAddr16>; 366 def MxAS32 : MxMemOp<(ops OtherVT), MxSize32, "B", "printAS32Mem", MxAddr32>; 374 def MxAL8 : MxMemOp<(ops OtherVT), MxSize8, "b", "printAL8Mem", MxAddr8>; 375 def MxAL16 : MxMemOp<(ops OtherVT), MxSize16, "b", "printAL16Mem", MxAddr16>; 376 def MxAL32 : MxMemOp<(ops OtherVT), MxSize32, "b", "printAL32Mem", MxAddr32>; 429 class MxBrTargetOperand<int N> : Operand<OtherVT> { 434 // Branch targets have OtherVT type and print as pc-relative values.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperands.td | 563 def brtarget16 : PCRelOperand<OtherVT, PCRel16> { 567 def brtarget32 : PCRelOperand<OtherVT, PCRel32> { 573 def brtarget12bpp : PCRelOperand<OtherVT, PCRel12> { 577 def brtarget16bpp : PCRelOperand<OtherVT, PCRel16> { 581 def brtarget24bpp : PCRelOperand<OtherVT, PCRel24> { 589 def brtarget16tls : PCRelTLSOperand<OtherVT, PCRelTLS16> { 594 def brtarget32tls : PCRelTLSOperand<OtherVT, PCRelTLS32> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepOperands.td | 32 def b13_2Imm : Operand<OtherVT> { let ParserMatchClass = b13_2ImmOperand; let DecoderMethod = "brta… 35 def b15_2Imm : Operand<OtherVT> { let ParserMatchClass = b15_2ImmOperand; let DecoderMethod = "brta… 41 def b30_2Imm : Operand<OtherVT> { let ParserMatchClass = b30_2ImmOperand; let DecoderMethod = "brta…
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrOperands.td | 174 def brtarget : BranchTargetOperand<OtherVT>; 175 def brtarget8 : BranchTargetOperand<OtherVT>; 176 def brtarget16 : BranchTargetOperand<OtherVT> { 179 def brtarget32 : BranchTargetOperand<OtherVT>;
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| H A D | X86InstrFragments.td | 50 [SDTCisVT<0, OtherVT>, 100 def SDTX86RepStr : SDTypeProfile<0, 1, [SDTCisVT<0, OtherVT>]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZc.td | 61 def reglist : RISCVOp<OtherVT> { 77 def stackadj : RISCVOp<OtherVT> { 89 def negstackadj : RISCVOp<OtherVT> {
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| H A D | RISCVInstrInfoXqccmp.td | 36 def reglist_s0 : RISCVOp<OtherVT> {
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| H A D | RISCVInstrInfo.td | 35 SDTCisVT<3, OtherVT>, 39 SDTCisVT<2, OtherVT>, 40 SDTCisVT<3, OtherVT>]>; 344 class BareSImm13Lsb0MaybeSym : Operand<OtherVT> { 394 def simm21_lsb0_jal : Operand<OtherVT>,
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| H A D | RISCVInstrInfoC.td | 141 def bare_simm9_lsb0 : Operand<OtherVT>, 205 def bare_simm12_lsb0 : Operand<OtherVT>,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 108 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'. 181 SDTCisInt<0>, SDTCisFP<1>, SDTCisSameNumEltsAs<0, 1>, SDTCisVT<2, OtherVT> 193 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>, 205 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT> 218 SDTCisVT<5, OtherVT> 222 SDTCisVT<0, OtherVT> 226 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT> 230 SDTCisInt<0>, SDTCisVT<1, OtherVT> 238 SDTCisVT<0, OtherVT>, SDTCisVT<1, OtherVT> 242 SDTCisVT<0, OtherVT>
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPInstrInfo.td | 110 SDTCisVT<3, OtherVT>,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 814 def directbrtarget : Operand<OtherVT> { 821 def absdirectbrtarget : Operand<OtherVT> { 831 def condbrtarget : Operand<OtherVT> { 838 def abscondbrtarget : Operand<OtherVT> { 1038 def pred : Operand<OtherVT> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 244 // Branch targets have OtherVT type. 245 def brtarget : Operand<OtherVT> { 252 def bprtarget : Operand<OtherVT> { 259 def bprtarget16 : Operand<OtherVT> { 266 def cbtarget : Operand<OtherVT> { 297 SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>; 299 SDTypeProfile<0, 3, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>, SDTCisVT<2, i64>]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsInstrInfo.td | 164 def jmptarget_mm : Operand<OtherVT> { 174 def brtarget7_mm : Operand<OtherVT> { 182 def brtarget10_mm : Operand<OtherVT> { 190 def brtarget_mm : Operand<OtherVT> {
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| H A D | Mips32r6InstrInfo.td | 37 def brtarget21 : Operand<OtherVT> { 45 def brtarget26 : Operand<OtherVT> { 53 def jmpoffset16 : Operand<OtherVT> {
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| H A D | MicroMips32r6InstrInfo.td | 13 def brtarget21_mm : Operand<OtherVT> { 21 def brtarget26_mm : Operand<OtherVT> { 29 def brtargetr6 : Operand<OtherVT> { 37 def brtarget_lsl2_mm : Operand<OtherVT> {
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 306 EVT OtherVT = N->getValueType(OtherNo); in ScalarizeVecRes_UnaryOpWithTwoResults() local 307 if (getTypeAction(OtherVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_UnaryOpWithTwoResults() 310 SDValue OtherVal = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, OtherVT, in ScalarizeVecRes_UnaryOpWithTwoResults() 381 EVT OtherVT = N->getValueType(OtherNo); in ScalarizeVecRes_OverflowOp() local 382 if (getTypeAction(OtherVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_OverflowOp() 386 ISD::SCALAR_TO_VECTOR, DL, OtherVT, SDValue(ScalarNode, OtherNo)); in ScalarizeVecRes_OverflowOp() 1969 EVT OtherVT = N->getValueType(OtherNo); in SplitVecRes_OverflowOp() local 1970 if (getTypeAction(OtherVT) == TargetLowering::TypeSplitVector) { in SplitVecRes_OverflowOp() 1975 ISD::CONCAT_VECTORS, dl, OtherVT, in SplitVecRes_OverflowOp() 2682 EVT OtherVT = N->getValueType(OtherNo); in SplitVecRes_UnaryOpWithTwoResults() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.td | 31 def SDT_MSP430BrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, 118 // Short jump targets have OtherVT type and are printed as pcrel imm values. 119 def jmptarget : Operand<OtherVT> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb.td | 127 def t_brtarget : Operand<OtherVT> { 140 def thumb_br_target : Operand<OtherVT> { 159 def thumb_bcc_target : Operand<OtherVT> { 165 def thumb_cb_target : Operand<OtherVT> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrFormats.td | 982 def btarget : BCTarget<OtherVT>; 988 class BranchTargetS<int BSz> : BCTargetSigned<OtherVT, BSz>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.td | 34 def SDT_LanaiBrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, 90 def BrTarget : Operand<OtherVT> {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.td | 170 def bb_op : Operand<OtherVT>;
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