Searched refs:OtherReg (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegAllocGreedy.cpp | 1254 Register OtherReg = Instr.getOperand(1).getReg(); in trySplitAroundHintReg() local
1255 if (OtherReg == Reg) { in trySplitAroundHintReg()
1256 OtherReg = Instr.getOperand(0).getReg(); in trySplitAroundHintReg()
1257 if (OtherReg == Reg) in trySplitAroundHintReg()
1264 OtherReg.isPhysical() ? OtherReg.asMCReg() : VRM->getPhys(OtherReg); in trySplitAroundHintReg()
2247 Register OtherReg = Instr.getOperand(0).getReg(); in collectHintInfo() local
2248 if (OtherReg == Reg) { in collectHintInfo()
2249 OtherReg = Instr.getOperand(1).getReg(); in collectHintInfo()
2250 if (OtherReg == Reg) in collectHintInfo()
2255 OtherReg.isPhysical() ? OtherReg.asMCReg() : VRM->getPhys(OtherReg); in collectHintInfo()
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| H A D | RegisterCoalescer.cpp | 4068 Register OtherSrcReg, OtherReg; in applyTerminalRule() local
4070 if (!isMoveInstr(*TRI, &Copy, OtherSrcReg, OtherReg, OtherSrcSubReg, in applyTerminalRule()
4073 if (OtherReg == SrcReg) in applyTerminalRule()
4074 OtherReg = OtherSrcReg; in applyTerminalRule()
4076 if (OtherReg.isPhysical() || isTerminalReg(OtherReg, MI, MRI)) in applyTerminalRule()
4079 if (LIS->getInterval(OtherReg).overlaps(DstLI)) { in applyTerminalRule()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyDebugValueManager.cpp | 150 Register OtherReg = DbgOp.getReg(); in getSinkableDebugValues() local
151 MachineInstr *OtherDef = MRI.getUniqueVRegDef(OtherReg); in getSinkableDebugValues()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 164 Register OtherReg = in getRegAllocationHints() local
166 if (MRI->getRegClass(OtherReg) == &SystemZ::GRX32BitRegClass) in getRegAllocationHints()
167 Worklist.push_back(OtherReg); in getRegAllocationHints()
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| H A D | SystemZShortenInst.cpp | 90 Register OtherReg = TRI->getSubReg(GR64BitReg, otherSubRegIdx); in shortenIIF() local
91 if (!LiveRegs.available(OtherReg)) in shortenIIF()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 401 Register OtherReg = Hint.second; in updateRegAllocHint() local
402 Hint = MRI->getRegAllocationHint(OtherReg); in updateRegAllocHint()
405 MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg); in updateRegAllocHint()
411 OtherReg); in updateRegAllocHint()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1199 &Optimized](Register &Reg, Register &OtherReg, in emitSelect()
1217 std::swap(Reg, OtherReg); in emitSelect()
1234 std::swap(Reg, OtherReg); in emitSelect()
1253 std::swap(Reg, OtherReg); in emitSelect()
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