Searched refs:Orders (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 738 SmallVectorImpl<std::pair<unsigned, MachineInstr*> > &Orders, in ProcessSDDbgValues()
774 Orders.push_back({DVOrder, DbgMI}); in ProcessSDDbgValues()
785 SmallVectorImpl<std::pair<unsigned, MachineInstr *>> &Orders, in ProcessSourceNode() argument
791 ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, 0); in ProcessSourceNode()
801 Orders.push_back({Order, NewInsn}); in ProcessSourceNode()
806 ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, Order); in ProcessSourceNode()
855 SmallVector<std::pair<unsigned, MachineInstr*>, 32> Orders; in EmitSchedule() local
955 ProcessSourceNode(N, DAG, Emitter, VRBaseMap, Orders, Seen, NewInsn); in EmitSchedule()
967 ProcessSourceNode(SU->getNode(), DAG, Emitter, VRBaseMap, Orders, Seen, in EmitSchedule()
984 llvm::stable_sort(Orders, less_first()); in EmitSchedule()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 120 SmallVectorImpl<MachineDomTreeNode *> &Orders,
1436 SmallVectorImpl<MachineDomTreeNode *> &Orders, in getVisitOrders() argument
1495 Orders.push_back(MDT.getNode(Root)); in getVisitOrders()
1497 MachineDomTreeNode *Node = Orders[idx++]; in getVisitOrders()
1500 Orders.push_back(Child); in getVisitOrders()
1502 } while (idx != Orders.size()); in getVisitOrders()
1503 assert(Orders.size() == WorkSet.size() && in getVisitOrders()
1507 LLVM_DEBUG(dbgs() << "Orders size is " << Orders.size() << "\n"); in getVisitOrders()
1508 SmallVector<MachineDomTreeNode *, 32>::reverse_iterator RIt = Orders.rbegin(); in getVisitOrders()
1509 for (; RIt != Orders.rend(); RIt++) in getVisitOrders()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | ConstantHoisting.cpp | 256 SmallVector<BasicBlock *, 16> Orders; in findBestInsertionSet() local
257 Orders.push_back(Entry); in findBestInsertionSet()
258 while (Idx != Orders.size()) { in findBestInsertionSet()
259 BasicBlock *Node = Orders[Idx++]; in findBestInsertionSet()
262 Orders.push_back(ChildDomNode->getBlock()); in findBestInsertionSet()
273 InsertPtsMap.reserve(Orders.size() + 1); in findBestInsertionSet()
274 for (BasicBlock *Node : llvm::reverse(Orders)) { in findBestInsertionSet()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.h | 319 std::vector<SmallVector<const Record *, 16>> Orders; variable
466 return Orders[No];
470 unsigned getNumOrders() const { return Orders.size(); } in getNumOrders()
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| H A D | CodeGenRegisters.cpp | 701 Orders.resize(1 + AltOrders->size()); in CodeGenRegisterClass()
706 Orders[0].push_back(Element); in CodeGenRegisterClass()
719 Orders[1 + Idx].append(Order.begin(), Order.end()); in CodeGenRegisterClass()
808 Orders.resize(Super.Orders.size()); in inheritProperties()
809 for (auto [Idx, Outer] : enumerate(Super.Orders)) in inheritProperties()
812 Orders[Idx].push_back(Reg); in inheritProperties()
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| /freebsd/contrib/bmake/ |
| H A D | bmake.cat1 | 991 ::OO Orders the words lexicographically.
993 ::OOnn Orders the words numerically. A number followed by one of `k', `M'
998 ::OOrr Orders the words in reverse lexicographical order.
1001 Orders the words in reverse numerical order.
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| /freebsd/contrib/tzdata/ |
| H A D | europe | 384 # Summer Time Act, 1925 and Summer Time Orders, 1926 and 1947:
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