Searched refs:OrDst (Results 1 – 3 of 3) sorted by relevance
772 const MachineOperand &OrDst = PossibleOrSaveexec.getOperand(0); in tryRecordOrSaveexecXorSequence() local774 if (OrDst.isReg() && OrSrc0.isReg()) { in tryRecordOrSaveexecXorSequence()775 if ((XorSrc0.getReg() == Exec && XorSrc1.getReg() == OrDst.getReg()) || in tryRecordOrSaveexecXorSequence()776 (XorSrc0.getReg() == OrDst.getReg() && XorSrc1.getReg() == Exec)) { in tryRecordOrSaveexecXorSequence()
983 MachineOperand *OrDst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand() local984 assert(OrDst && OrDst->isReg()); in matchSDWAOperand()987 OrDst, OrSDWADef, OrOtherDef, DstSel); in matchSDWAOperand()
3387 Register OrDst = MI.getOperand(0).getReg(); in matchRedundantOr() local3400 if (canReplaceReg(OrDst, LHS, MRI) && in matchRedundantOr()3407 if (canReplaceReg(OrDst, RHS, MRI) && in matchRedundantOr()