| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | NaryReassociate.cpp | 628 SmallVector<const SCEV *, 2> Ops1{BExpr, AExpr}; in tryReassociateMinOrMax() local
630 const SCEV *R1Expr = SE->getMinMaxExpr(SCEVType, Ops1); in tryReassociateMinOrMax()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 1200 unsigned IntPredicate, Constant *Ops0, Constant *Ops1, const DataLayout &DL, in ConstantFoldCompareInstOperands() argument
1214 if (Ops1->isNullValue()) { in ConstantFoldCompareInstOperands()
1238 if (auto *CE1 = dyn_cast<ConstantExpr>(Ops1)) { in ConstantFoldCompareInstOperands()
1280 Value *Stripped1 = Ops1->stripAndAccumulateConstantOffsets( in ConstantFoldCompareInstOperands()
1290 } else if (isa<ConstantExpr>(Ops1)) { in ConstantFoldCompareInstOperands()
1294 return ConstantFoldCompareInstOperands(Predicate, Ops1, Ops0, DL, TLI); in ConstantFoldCompareInstOperands()
1303 Ops1 = FlushFPConstant(Ops1, I, /*IsOutput=*/false); in ConstantFoldCompareInstOperands()
1304 if (!Ops1) in ConstantFoldCompareInstOperands()
1308 return ConstantFoldCompareInstruction(Predicate, Ops0, Ops1); in ConstantFoldCompareInstOperands()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | DebugInfoMetadata.h | 142 ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = {})
143 : MDNode(C, ID, Storage, Ops1, Ops2) { in MDNode() argument
244 unsigned Tag, ArrayRef<Metadata *> Ops1, in GenericDINode() argument
246 : DINode(C, GenericDINodeKind, Storage, Tag, Ops1, Ops2) { in GenericDINode()
4393 ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = {})
4394 : MDNode(C, ID, Storage, Ops1, Ops2) {
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| H A D | Metadata.h | 1184 ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = {});
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Metadata.cpp | 652 ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2) in MDNode() argument
655 for (Metadata *MD : Ops1) in MDNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 5704 SDValue Ops1[] = { SDValue(Lo, 0), getI16Imm(ImmHi, dl)}; in Select() local
5705 CurDAG->SelectNodeTo(N, PPC::ORIS8, MVT::i64, Ops1); in Select()
5727 SDValue Ops1[] = { SDValue(Lo, 0), getI16Imm(ImmHi, dl)}; in Select() local
5728 CurDAG->SelectNodeTo(N, PPC::XORIS8, MVT::i64, Ops1); in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 41877 SmallVector<SDValue, 2> Ops0, Ops1; in combineBlendOfPermutes() local
41880 !getTargetShuffleMask(BC1, /*AllowSentinelZero=*/false, Ops1, Mask1) || in combineBlendOfPermutes()
41950 DAG.getBitcast(VT, Ops1[0]), NewBlendMask); in combineBlendOfPermutes()
42862 SmallVector<SDValue, 2> Ops1; in combineTargetShuffle() local
42864 if (getTargetShuffleAndZeroables(Op1, TargetMask1, Ops1, KnownUndef1, in combineTargetShuffle()
42876 Op1 = Ops1[M < 4 ? 0 : 1]; in combineTargetShuffle()
50119 SmallVector<SDValue> Ops0, Ops1; in combineHorizOpWithShuffle() local
50126 getTargetShuffleInputs(BC1, Ops1, Mask1, DAG) && !isAnyZero(Mask1) && in combineHorizOpWithShuffle()
50128 all_of(Ops1, [](SDValue Op) { return Op.getValueSizeInBits() == 128; }); in combineHorizOpWithShuffle()
50135 Ops1.assign({BC1}); in combineHorizOpWithShuffle()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/ |
| H A D | ARM.cpp | 4650 llvm::Value *Ops1 = EmitSVEPredicateCast(Ops[1], OverloadedTy); in EmitAArch64SVEBuiltinExpr() local
4651 llvm::Value *PSel = Builder.CreateCall(F, {Ops0, Ops1, Ops[2]}); in EmitAArch64SVEBuiltinExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15191 SmallVector<SDValue, 8> Ops1(NumElts / 2, Vals[0]); in LowerBUILD_VECTOR() local
15194 LowerBUILD_VECTOR(DAG.getBuildVector(SubVT, DL, Ops1), DAG); in LowerBUILD_VECTOR()
15222 SmallVector<SDValue, 8> Ops1(NumElts, Vals[0]); in LowerBUILD_VECTOR() local
15224 SDValue VEC1 = DAG.getBuildVector(VT, DL, Ops1); in LowerBUILD_VECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 16368 const SDValue Ops1[] = { in wrapAddr64Rsrc() local
16373 return DAG.getMachineNode(AMDGPU::REG_SEQUENCE, DL, MVT::v4i32, Ops1); in wrapAddr64Rsrc()
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