Searched refs:Opnds (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1221 SmallVector<SDValue, 3> Opnds; in SelectDS1Addr1Offset() local
1222 Opnds.push_back(Zero); in SelectDS1Addr1Offset()
1223 Opnds.push_back(Addr.getOperand(1)); in SelectDS1Addr1Offset()
1229 Opnds.push_back( in SelectDS1Addr1Offset()
1234 CurDAG->getMachineNode(SubOp, DL, MVT::i32, Opnds); in SelectDS1Addr1Offset()
1408 SmallVector<SDValue, 3> Opnds; in SelectDSReadWrite2() local
1409 Opnds.push_back(Zero); in SelectDSReadWrite2()
1410 Opnds.push_back(Addr.getOperand(1)); in SelectDSReadWrite2()
1414 Opnds.push_back( in SelectDSReadWrite2()
1419 SubOp, DL, MVT::getIntegerVT(Size * 8), Opnds); in SelectDSReadWrite2()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 1376 SmallVector<XorOpnd, 8> Opnds; in OptimizeXor() local
1391 Opnds.push_back(O); in OptimizeXor()
1400 for (XorOpnd &Op : Opnds) in OptimizeXor()
1423 for (unsigned i = 0, e = Opnds.size(); i < e; i++) { in OptimizeXor()
1464 for (const XorOpnd &O : Opnds) { in OptimizeXor()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 199 Value *createNaryFAdd(const AddendVect& Opnds, unsigned InstrQuota);
593 (const AddendVect &Opnds, unsigned InstrQuota) { in createNaryFAdd() argument
594 assert(!Opnds.empty() && "Expect at least one addend"); in createNaryFAdd()
598 unsigned InstrNeeded = calcInstrNumber(Opnds); in createNaryFAdd()
616 for (const FAddend *Opnd : Opnds) { in createNaryFAdd()
691 unsigned FAddCombine::calcInstrNumber(const AddendVect &Opnds) { in calcInstrNumber() argument
692 unsigned OpndNum = Opnds.size(); in calcInstrNumber()
696 for (const FAddend *Opnd : Opnds) { in calcInstrNumber()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 16140 SmallVector<SDValue, 8> Opnds; in visitTRUNCATE() local
16143 Opnds.push_back(BuildVect.getOperand(i)); in visitTRUNCATE()
16145 return DAG.getBuildVector(VT, DL, Opnds); in visitTRUNCATE()
16198 SmallVector<SDValue, 8> Opnds; in visitTRUNCATE() local
16201 Opnds.push_back(DAG.getUNDEF(VTs[i])); in visitTRUNCATE()
16206 Opnds.push_back(NV); in visitTRUNCATE()
16208 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Opnds); in visitTRUNCATE()
25330 SmallVector<SDValue, 8> Opnds; in visitCONCAT_VECTORS() local
25352 Opnds.append(NumElts, DAG.getUNDEF(MinVT)); in visitCONCAT_VECTORS()
25357 Opnds.append(Op->op_begin(), Op->op_begin() + NumElts); in visitCONCAT_VECTORS()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22958 SmallVector<SDValue, 8> Opnds; in matchScalarReduction() local
22966 Opnds.push_back(Op.getOperand(0)); in matchScalarReduction()
22967 Opnds.push_back(Op.getOperand(1)); in matchScalarReduction()
22969 for (unsigned Slot = 0, e = Opnds.size(); Slot < e; ++Slot) { in matchScalarReduction()
22970 SmallVectorImpl<SDValue>::const_iterator I = Opnds.begin() + Slot; in matchScalarReduction()
22973 Opnds.push_back(I->getOperand(0)); in matchScalarReduction()
22974 Opnds.push_back(I->getOperand(1)); in matchScalarReduction()
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