| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/LowLevel/ |
| H A D | DWARFCFIProgram.cpp | 46 uint32_t OperandIdx) const { in getOperandAsUnsigned()
47 if (OperandIdx >= MaxOperands) in getOperandAsUnsigned()
50 OperandIdx); in getOperandAsUnsigned()
51 OperandType Type = CFIP.getOperandTypes()[Opcode][OperandIdx]; in getOperandAsUnsigned()
52 uint64_t Operand = Ops[OperandIdx]; in getOperandAsUnsigned()
59 OperandIdx, CFIProgram::operandTypeString(Type)); in getOperandAsUnsigned()
68 OperandIdx); in getOperandAsUnsigned()
82 OperandIdx); in getOperandAsUnsigned()
91 uint32_t OperandIdx) const { in getOperandAsSigned()
92 if (OperandIdx >= MaxOperands) in getOperandAsSigned()
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFCFIPrinter.cpp | 44 unsigned OperandIdx, uint64_t Operand, in printOperand() argument
46 assert(OperandIdx < CFIProgram::MaxOperands); in printOperand()
48 CFIProgram::OperandType Type = P.getOperandTypes()[Opcode][OperandIdx]; in printOperand()
52 OS << " Unsupported " << (OperandIdx ? "second" : "first") << " operand to"; in printOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600Packetizer.cpp | 81 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write); in getPreviousVector() local
82 if (OperandIdx > -1 && BI->getOperand(OperandIdx).getImm() == 0) in getPreviousVector()
128 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Op); in substitutePV() local
129 if (OperandIdx < 0) in substitutePV()
131 Register Src = MI.getOperand(OperandIdx).getReg(); in substitutePV()
134 MI.getOperand(OperandIdx).setReg(It->second); in substitutePV()
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| H A D | GCNVOPDUtils.cpp | 77 auto getVRegIdx = [&](unsigned OpcodeIdx, unsigned OperandIdx) { in checkVOPDRegConstraints() argument
79 const MachineOperand &Operand = MI.getOperand(OperandIdx); in checkVOPDRegConstraints()
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| H A D | R600ISelLowering.cpp | 2088 int OperandIdx[] = { in PostISelFolding() local
2119 if (OperandIdx[i] < 0) in PostISelFolding()
2121 SDValue &Src = Ops[OperandIdx[i] - 1]; in PostISelFolding()
2125 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding()
2141 int OperandIdx[] = { in PostISelFolding() local
2157 if (OperandIdx[i] < 0) in PostISelFolding()
2159 SDValue &Src = Ops[OperandIdx[i] - 1]; in PostISelFolding()
2164 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 169 unsigned OperandIdx) const { in getOperandCycle()
175 if ((FirstIdx + OperandIdx) >= LastIdx) in getOperandCycle()
178 return OperandCycles[FirstIdx + OperandIdx];
167 getOperandCycle(unsigned ItinClassIndx,unsigned OperandIdx) getOperandCycle() argument
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| /freebsd/contrib/llvm-project/llvm/lib/SandboxIR/ |
| H A D | User.cpp | 91 void User::setOperand(unsigned OperandIdx, Value *Operand) { in setOperand() argument
93 const auto &U = getOperandUse(OperandIdx); in setOperand()
97 cast<llvm::User>(Val)->setOperand(OperandIdx, Operand->Val); in setOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | CanonicalizeFreezeInLoops.cpp | 214 unsigned OperandIdx = in run() local
216 InsertFreezeAndForgetFromSCEV(PHI->getOperandUse(OperandIdx)); in run()
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| H A D | ScalarEvolutionExpander.cpp | 2004 WorkItem.ParentOpcode, WorkItem.OperandIdx, Imm, Ty, CostKind); in isHighCostExpansionHelper()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/LowLevel/ |
| H A D | DWARFCFIProgram.h | 51 uint32_t OperandIdx) const;
54 uint32_t OperandIdx) const;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/SandboxIR/ |
| H A D | User.h | 133 virtual void setOperand(unsigned OperandIdx, Value *Operand);
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
| H A D | ScalarEvolutionExpander.h | 36 ParentOpcode(Opc), OperandIdx(Idx), S(S) { } in SCEVOperand()
40 int OperandIdx; member
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineFunction.cpp | 1259 unsigned OperandIdx = 0; in finalizeDebugInstrRefs() local
1263 ++OperandIdx; in finalizeDebugInstrRefs()
1265 assert(OperandIdx < DefMI.getNumOperands()); in finalizeDebugInstrRefs()
1269 MO.ChangeToDbgInstrRef(ID, OperandIdx); in finalizeDebugInstrRefs()
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| H A D | CodeGenPrepare.cpp | 8126 unsigned OperandIdx) { in canCauseUndefinedBehavior() argument
8129 if (OperandIdx != 1) in canCauseUndefinedBehavior()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 892 unsigned OperandIdx = 0; in EmitDbgInstrRef() local
896 ++OperandIdx; in EmitDbgInstrRef()
898 assert(OperandIdx < DefMI->getNumOperands()); in EmitDbgInstrRef()
902 MOs.push_back(MachineOperand::CreateDbgInstrRef(InstrNum, OperandIdx)); in EmitDbgInstrRef()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | RewriteStatepointsForGC.cpp | 1229 auto UpdateOperand = [&](int OperandIdx) { in findBasePointer() argument
1230 Value *InVal = BdvIE->getOperand(OperandIdx); in findBasePointer()
1232 BaseIE->setOperand(OperandIdx, Base); in findBasePointer()
1239 auto UpdateOperand = [&](int OperandIdx) { in findBasePointer() argument
1240 Value *InVal = BdvSV->getOperand(OperandIdx); in findBasePointer()
1242 BaseSV->setOperand(OperandIdx, Base); in findBasePointer()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3947 auto getVRegIdx = [&](unsigned, unsigned OperandIdx) { in checkVOPDRegBankConstraints() argument
3948 const MCOperand &Opr = Inst.getOperand(OperandIdx); in checkVOPDRegBankConstraints()
7444 unsigned OperandIdx[4]; in cvtExp() local
7454 OperandIdx[SrcIdx] = Inst.size(); in cvtExp()
7462 OperandIdx[SrcIdx] = Inst.size(); in cvtExp()
7485 Inst.getOperand(OperandIdx[1]) = Inst.getOperand(OperandIdx[2]); in cvtExp()
7486 Inst.getOperand(OperandIdx[2]).setReg(MCRegister()); in cvtExp()
7487 Inst.getOperand(OperandIdx[3]).setReg(MCRegister()); in cvtExp()
7491 if (Inst.getOperand(OperandIdx[i]).getReg()) { in cvtExp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2287 unsigned OperandIdx = Commuted ? 2 : 1; in hasReassociableSibling() local
2289 *MRI.getVRegDef(Inst.getOperand(OperandIdx).getReg()); in hasReassociableSibling()
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| H A D | RISCVISelLowering.cpp | 16918 NodeExtensionHelper(SDNode *Root, unsigned OperandIdx, SelectionDAG &DAG, in NodeExtensionHelper()
16923 assert(OperandIdx < 2 && "Requesting something else than LHS or RHS"); in NodeExtensionHelper()
16925 OrigOperand = Root->getOperand(OperandIdx); in NodeExtensionHelper()
16940 if (OperandIdx == 1) in NodeExtensionHelper()
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