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Searched refs:OperIdx (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DScheduleDAGInstrs.cpp259 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps() argument
260 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx); in addPhysRegDataDeps()
270 bool ImplicitPseudoDef = (OperIdx >= DefMIDesc.getNumOperands() && in addPhysRegDataDeps()
301 Dep.setLatency(SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, in addPhysRegDataDeps()
306 ST.adjustSchedDependency(SU, OperIdx, UseSU, UseOpIdx, Dep, &SchedModel); in addPhysRegDataDeps()
315 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps() argument
317 MachineOperand &MO = MI->getOperand(OperIdx); in addPhysRegDeps()
345 SchedModel.computeOutputLatency(MI, OperIdx, DefInstr)); in addPhysRegDeps()
347 ST.adjustSchedDependency(SU, OperIdx, DefSU, I->OpIdx, Dep, in addPhysRegDeps()
360 Uses.insert(PhysRegSUOper(SU, OperIdx, Unit)); in addPhysRegDeps()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAGInstrs.h399 void addPhysRegDataDeps(SUnit *SU, unsigned OperIdx);
400 void addPhysRegDeps(SUnit *SU, unsigned OperIdx);
401 void addVRegDefDeps(SUnit *SU, unsigned OperIdx);
402 void addVRegUseDeps(SUnit *SU, unsigned OperIdx);
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenSchedule.cpp1489 unsigned OperIdx = RWSequences.size() - 1; in pushVariant() local
1493 RWSequences[OperIdx]); in pushVariant()
1499 ++RWI, ++OperIdx) { in pushVariant()
1505 llvm::append_range(RWSequences[OperIdx], ExpandedRWs); in pushVariant()
1507 assert(OperIdx == RWSequences.size() && "missed a sequence"); in pushVariant()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyIndVar.cpp136 const unsigned OperIdx = 0; in foldIVUser() local
146 if (IVOperand != UseInst->getOperand(OperIdx) || in foldIVUser()
189 UseInst->setOperand(OperIdx, IVSrc); in foldIVUser()