| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTLSDynamicCall.cpp | 102 unsigned Opc1, Opc2; in processBlock() local
107 Opc1 = PPC::ADDItlsgdL; in processBlock()
111 Opc1 = PPC::ADDItlsldL; in processBlock()
115 Opc1 = PPC::ADDItlsgdL32; in processBlock()
119 Opc1 = PPC::ADDItlsldL32; in processBlock()
150 Opc1 = PPC::PADDI8pc; in processBlock()
274 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addImm(0); in processBlock()
278 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addReg(InReg); in processBlock()
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| H A D | PPCISelDAGToDAG.cpp | 6227 unsigned Opc1, Opc2, Opc3; in Select() local
6231 Opc1 = PPC::VSPLTISB; in Select()
6236 Opc1 = PPC::VSPLTISH; in Select()
6242 Opc1 = PPC::VSPLTISW; in Select()
6256 SDNode *Tmp = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
6268 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
6270 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
6282 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
6284 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.h | 56 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
60 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
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| H A D | Mips16ISelLowering.cpp | 571 Mips16TargetLowering::emitSelT16(unsigned Opc1, unsigned Opc2, MachineInstr &MI, in emitSelT16() argument
609 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSelT16()
636 Mips16TargetLowering::emitSeliT16(unsigned Opc1, unsigned Opc2, in emitSeliT16() argument
675 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSeliT16()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNCreateVOPD.cpp | 72 unsigned Opc1 = FirstMI->getOpcode(); in doReplace() local
77 AMDGPU::getVOPDFull(AMDGPU::getVOPDOpcode(Opc1), in doReplace()
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| H A D | GCNHazardRecognizer.cpp | 2247 unsigned Opc1 = MI1->getOpcode(); in checkMAIHazards90A() local
2250 if (!isDGEMM(Opc) && (!ST.hasGFX940Insts() && isDGEMM(Opc1))) { in checkMAIHazards90A()
2255 (Opc1 == AMDGPU::V_MFMA_F64_4X4X4F64_e64 || in checkMAIHazards90A()
2256 Opc1 == AMDGPU::V_MFMA_F64_4X4X4F64_vgprcd_e64)) in checkMAIHazards90A()
2262 switch (Opc1) { in checkMAIHazards90A()
2314 switch (Opc1) { in checkMAIHazards90A()
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| H A D | SIInstrInfo.cpp | 84 unsigned Opc1 = N1->getMachineOpcode(); in nodesHaveSameOperandValue() local
87 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName); in nodesHaveSameOperandValue()
237 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr() local
240 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad()) in areLoadsFromSameBasePtr()
244 if (!get(Opc0).getNumDefs() || !get(Opc1).getNumDefs()) in areLoadsFromSameBasePtr()
247 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
261 int Offset1Idx = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset); in areLoadsFromSameBasePtr()
270 Offset1Idx -= get(Opc1).NumDefs; in areLoadsFromSameBasePtr()
276 if (isSMRD(Opc0) && isSMRD(Opc1)) { in areLoadsFromSameBasePtr()
279 !AMDGPU::hasNamedOperand(Opc1, AMDGPU::OpName::sbase)) in areLoadsFromSameBasePtr()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86EncodingOptimization.cpp | 203 unsigned Opc1; in optimizeVPCMPWithImmediateOneOrSix() local
207 Opc1 = X86::TO1; \ in optimizeVPCMPWithImmediateOneOrSix()
279 NewOpc = Opc1; in optimizeVPCMPWithImmediateOneOrSix()
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| /freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ContainerModeling.cpp | 131 BinaryOperator::Opcode Opc1,
969 BinaryOperator::Opcode Opc1, in invalidateIteratorPositions() argument
973 return compare(State, Pos.getOffset(), Offset1, Opc1) && in invalidateIteratorPositions()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 2293 BinaryOperator::BinaryOps Opc1 = B1->getOpcode(); in foldSelectShuffle() local
2295 if (ConstantsAreOp1 && Opc0 != Opc1) { in foldSelectShuffle()
2299 if (Opc0 == Instruction::Shl || Opc1 == Instruction::Shl) in foldSelectShuffle()
2307 Opc1 = AltB1.Opcode; in foldSelectShuffle()
2312 if (Opc0 != Opc1 || !C0 || !C1) in foldSelectShuffle()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 25528 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25549 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25561 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25583 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25604 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25637 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25663 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25675 unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
25724 NewOp = DAG.getNode(IntrData->Opc1, dl, VT, Src1, Src2, in LowerINTRINSIC_WO_CHAIN()
25741 Opc = IntrData->Opc1; in LowerINTRINSIC_WO_CHAIN()
[all …]
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| H A D | X86IntrinsicsInfo.h | 84 uint16_t Opc1; member
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| H A D | X86InstrInfo.cpp | 8784 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear() local
8786 if (Opc1 != Opc2) in shouldScheduleLoadsNear()
8789 switch (Opc1) { in shouldScheduleLoadsNear()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 413 unsigned Opc1 = Is64Bit ? AArch64::MOVi64imm : AArch64::MOVi32imm; in materializeFP() local
418 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc1), TmpReg) in materializeFP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 233 unsigned Opc1, unsigned Opc2, bool isExt);
6853 unsigned NumVec, unsigned Opc1, in SelectTable() argument
6856 unsigned Opc = MRI.getType(DstReg) == LLT::fixed_vector(8, 8) ? Opc1 : Opc2; in SelectTable()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 8696 Value *Opc1 = EmitScalarExpr(E->getArg(1)); in EmitARMBuiltinExpr() local
8705 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); in EmitARMBuiltinExpr()
8723 Value *Opc1 = EmitScalarExpr(E->getArg(1)); in EmitARMBuiltinExpr() local
8725 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); in EmitARMBuiltinExpr()
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