Home
last modified time | relevance | path

Searched refs:Opc0 (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp2292 BinaryOperator::BinaryOps Opc0 = B0->getOpcode(); in foldSelectShuffle() local
2295 if (ConstantsAreOp1 && Opc0 != Opc1) { in foldSelectShuffle()
2299 if (Opc0 == Instruction::Shl || Opc1 == Instruction::Shl) in foldSelectShuffle()
2303 Opc0 = AltB0.Opcode; in foldSelectShuffle()
2312 if (Opc0 != Opc1 || !C0 || !C1) in foldSelectShuffle()
2316 BinaryOperator::BinaryOps BOpc = Opc0; in foldSelectShuffle()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp83 unsigned Opc0 = N0->getMachineOpcode(); in nodesHaveSameOperandValue() local
86 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName); in nodesHaveSameOperandValue()
236 unsigned Opc0 = Load0->getMachineOpcode(); in areLoadsFromSameBasePtr() local
240 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad()) in areLoadsFromSameBasePtr()
244 if (!get(Opc0).getNumDefs() || !get(Opc1).getNumDefs()) in areLoadsFromSameBasePtr()
247 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
260 int Offset0Idx = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset); in areLoadsFromSameBasePtr()
269 Offset0Idx -= get(Opc0).NumDefs; in areLoadsFromSameBasePtr()
276 if (isSMRD(Opc0) && isSMRD(Opc1)) { in areLoadsFromSameBasePtr()
278 if (!AMDGPU::hasNamedOperand(Opc0, AMDGPU::OpName::sbase) || in areLoadsFromSameBasePtr()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp25539 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
25547 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25573 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
25581 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25616 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
25626 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
25650 DAG.getNode(IntrData->Opc0, dl, VT, Src), Mask, PassThru, in LowerINTRINSIC_WO_CHAIN()
25661 Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
25692 return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1, in LowerINTRINSIC_WO_CHAIN()
25700 unsigned Opc = IntrData->Opc0; in LowerINTRINSIC_WO_CHAIN()
[all …]
H A DX86IntrinsicsInfo.h83 uint16_t Opc0; member
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp7486 unsigned Opc0 = N0.getOpcode(); in isBSwapHWordElement() local
7487 if (Opc0 != ISD::AND && Opc0 != ISD::SHL && Opc0 != ISD::SRL) in isBSwapHWordElement()
7494 else if (Opc0 == ISD::AND) in isBSwapHWordElement()
7508 if (Opc == ISD::SRL || (Opc == ISD::AND && Opc0 == ISD::SHL)) { in isBSwapHWordElement()
7522 if (Opc0 != ISD::SRL) in isBSwapHWordElement()
7530 if (Opc0 != ISD::SHL) in isBSwapHWordElement()
10943 unsigned Opc0 = Op0.getOpcode(); in foldABSToABD() local
10947 if (Opc0 != Op1.getOpcode() || in foldABSToABD()
10948 (Opc0 != ISD::ZERO_EXTEND && Opc0 != ISD::SIGN_EXTEND && in foldABSToABD()
10949 Opc0 != ISD::SIGN_EXTEND_INREG)) { in foldABSToABD()
[all …]