| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVISelLowering.cpp | 134 SPIRVType *OpType, bool ReuseType, in createNewPtrType() argument
139 OpType->getOperand(1).getImm()); in createNewPtrType()
158 SPIRVType *OpType = GR.getSPIRVTypeForVReg(OpTypeReg, MF); in validatePtrTypes() local
159 if (!ResType || !OpType || OpType->getOpcode() != SPIRV::OpTypePointer) in validatePtrTypes()
162 Register ElemTypeReg = OpType->getOperand(2).getReg(); in validatePtrTypes()
175 createNewPtrType(GR, I, OpType, IsSameMF, false, ResType, ResTy); in validatePtrTypes()
176 if (!GR.isBitcastCompatible(NewPtrType, OpType)) in validatePtrTypes()
192 SPIRVType *OpType = GR.getSPIRVTypeForVReg(OpTypeReg, MF); in validateGroupWaitEventsPtr() local
193 if (!OpType || OpType->getOpcode() != SPIRV::OpTypePointer) in validateGroupWaitEventsPtr()
195 SPIRVType *ElemType = GR.getSPIRVTypeForVReg(OpType->getOperand(2).getReg()); in validateGroupWaitEventsPtr()
[all …]
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| H A D | SPIRVInstructionSelector.cpp | 149 MachineInstr &I, unsigned OpType) const;
714 SPIRVType *OpType = OpReg.isValid() ? GR.getSPIRVTypeForVReg(OpReg) : nullptr; in selectBitcast() local
715 if (!GR.isBitcastCompatible(ResType, OpType)) in selectBitcast()
1917 SPIRVType *OpType = GR.getSPIRVTypeForVReg(OpReg); in wrapIntoSpecConstantOp() local
1919 if (!OpDefine || !OpType || isConstReg(MRI, OpDefine, Visited) || in wrapIntoSpecConstantOp()
1921 GR.isAggregateType(OpType)) { in wrapIntoSpecConstantOp()
1939 GR.assignSPIRVTypeToVReg(OpType, WrapReg, *MF); in wrapIntoSpecConstantOp()
1943 .addUse(GR.getSPIRVTypeID(OpType)) in wrapIntoSpecConstantOp()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Instrumentation/ |
| H A D | AddressSanitizerCommon.h | 29 Type *OpType; variable
40 class Type *OpType, MaybeAlign Alignment,
44 : IsWrite(IsWrite), OpType(OpType), Alignment(Alignment), in IsWrite()
47 TypeStoreSize = DL.getTypeStoreSizeInBits(OpType); in IsWrite()
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| /freebsd/contrib/llvm-project/lldb/include/lldb/Symbol/ |
| H A D | PostfixExpression.h | 53 enum OpType { enum
59 BinaryOpNode(OpType op_type, Node &left, Node &right) in BinaryOpNode()
62 OpType GetOpType() const { return m_op_type; } in GetOpType()
73 OpType m_op_type;
134 enum OpType { enum
138 UnaryOpNode(OpType op_type, Node &operand) in UnaryOpNode()
141 OpType GetOpType() const { return m_op_type; } in GetOpType()
149 OpType m_op_type;
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | AsmWriterInst.h | 26 enum OpType { enum
53 AsmWriterOperand(OpType op = isLiteralTextOperand) : OperandType(op) {} in OperandType()
55 AsmWriterOperand(const std::string &LitStr, OpType op = isLiteralTextOperand)
60 OpType op = isMachineInstrOperand, bool PCRel = false)
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| /freebsd/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | EvalEmitter.cpp | 140 template <PrimType OpType> bool EvalEmitter::emitRet(const SourceInfo &Info) { in emitRet()
147 using T = typename PrimConv<OpType>::T; in emitRet()
237 template <PrimType OpType>
242 using T = typename PrimConv<OpType>::T; in emitGetLocal()
249 template <PrimType OpType>
254 using T = typename PrimConv<OpType>::T; in emitSetLocal()
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| /freebsd/sys/contrib/dev/acpica/components/dispatcher/ |
| H A D | dswexec.c | 505 UINT32 OpType; in AcpiDsExecEndOp() local
518 OpType = WalkState->OpInfo->Type; in AcpiDsExecEndOp()
592 Status = AcpiGbl_OpTypeDispatch[OpType] (WalkState); in AcpiDsExecEndOp()
636 switch (OpType) in AcpiDsExecEndOp()
865 OpClass, OpType, Op->Common.AmlOpcode, Op)); in AcpiDsExecEndOp()
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| /freebsd/sys/contrib/dev/acpica/components/parser/ |
| H A D | psopinfo.c | 312 UINT32 OpType) in AcpiPsGetArgumentCount() argument
315 if (OpType <= AML_TYPE_EXEC_6A_0T_1R) in AcpiPsGetArgumentCount()
317 return (AcpiGbl_ArgumentCount[OpType]); in AcpiPsGetArgumentCount()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCDwarf.h | 486 enum OpType : uint8_t { enum
525 OpType Operation;
530 MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, SMLoc Loc,
537 MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R1, unsigned R2, SMLoc Loc) in MCCFIInstruction()
542 MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, unsigned AS, in MCCFIInstruction()
549 MCCFIInstruction(OpType Op, MCSymbol *L, MCSymbol *CfiLabel, SMLoc Loc) in MCCFIInstruction()
680 OpType getOperation() const { return Operation; } in getOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlan.h | 1014 OperationType OpType; variable
1029 OpType = Other.OpType; in transferFlags()
1037 OpType = OperationType::Other; in VPSingleDefRecipe()
1045 OpType = OperationType::Cmp; in VPRecipeWithIRFlags()
1048 OpType = OperationType::DisjointOp; in VPRecipeWithIRFlags()
1051 OpType = OperationType::OverflowingBinOp; in VPRecipeWithIRFlags()
1054 OpType = OperationType::PossiblyExactOp; in VPRecipeWithIRFlags()
1057 OpType = OperationType::GEPOp; in VPRecipeWithIRFlags()
1060 OpType = OperationType::NonNegOp; in VPRecipeWithIRFlags()
1063 OpType = OperationType::FPMathOp; in VPRecipeWithIRFlags()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 2352 unsigned OpType = Desc.operands()[OpNo].OperandType; in isSISrcOperand() local
2353 return OpType >= AMDGPU::OPERAND_SRC_FIRST && in isSISrcOperand()
2354 OpType <= AMDGPU::OPERAND_SRC_LAST; in isSISrcOperand()
2359 unsigned OpType = Desc.operands()[OpNo].OperandType; in isKImmOperand() local
2360 return OpType >= AMDGPU::OPERAND_KIMM_FIRST && in isKImmOperand()
2361 OpType <= AMDGPU::OPERAND_KIMM_LAST; in isKImmOperand()
2366 unsigned OpType = Desc.operands()[OpNo].OperandType; in isSISrcFPOperand() local
2367 switch (OpType) { in isSISrcFPOperand()
2392 unsigned OpType = Desc.operands()[OpNo].OperandType; in isSISrcInlinableOperand() local
2393 return (OpType >= AMDGPU::OPERAND_REG_INLINE_C_FIRST && in isSISrcInlinableOperand()
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| /freebsd/contrib/llvm-project/lldb/source/Symbol/ |
| H A D | PostfixExpression.cpp | 24 static std::optional<BinaryOpNode::OpType>
39 static std::optional<UnaryOpNode::OpType>
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 217 uint8_t OpType = TII->get(Opcode).operands()[OpNo].OperandType; in canUseImmWithOpSel() local
218 switch (OpType) { in canUseImmWithOpSel()
238 uint8_t OpType = TII->get(Opcode).operands()[OpNo].OperandType; in tryFoldImmWithOpSel() local
243 if (AMDGPU::isInlinableLiteralV216(Fold.ImmToFold, OpType)) { in tryFoldImmWithOpSel()
277 if (AMDGPU::isInlinableLiteralV216(Imm, OpType)) { in tryFoldImmWithOpSel()
288 if (AMDGPU::isInlinableLiteralV216(Lo, OpType)) { in tryFoldImmWithOpSel()
296 if (AMDGPU::isInlinableLiteralV216(SExt, OpType)) { in tryFoldImmWithOpSel()
304 if (OpType == AMDGPU::OPERAND_REG_IMM_V2INT16 || in tryFoldImmWithOpSel()
305 OpType == AMDGPU::OPERAND_REG_INLINE_AC_V2INT16) { in tryFoldImmWithOpSel()
306 if (AMDGPU::isInlinableLiteralV216(Lo << 16, OpType)) { in tryFoldImmWithOpSel()
[all …]
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| H A D | SIRegisterInfo.h | 277 bool opCanUseLiteralConstant(unsigned OpType) const;
282 bool opCanUseInlineConstant(unsigned OpType) const;
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| H A D | AMDGPUPrintfRuntimeBinding.cpp | 121 static bool shouldPrintAsStr(char Specifier, Type *OpType) { in shouldPrintAsStr() argument
122 return Specifier == 's' && isa<PointerType>(OpType); in shouldPrintAsStr()
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| H A D | SIRegisterInfo.cpp | 2916 bool SIRegisterInfo::opCanUseInlineConstant(unsigned OpType) const { in opCanUseInlineConstant()
2917 if (OpType >= AMDGPU::OPERAND_REG_INLINE_AC_FIRST && in opCanUseInlineConstant()
2918 OpType <= AMDGPU::OPERAND_REG_INLINE_AC_LAST) in opCanUseInlineConstant()
2921 return OpType >= AMDGPU::OPERAND_SRC_FIRST && in opCanUseInlineConstant()
2922 OpType <= AMDGPU::OPERAND_SRC_LAST; in opCanUseInlineConstant()
2949 bool SIRegisterInfo::opCanUseLiteralConstant(unsigned OpType) const { in opCanUseLiteralConstant()
2951 return OpType >= AMDGPU::OPERAND_REG_IMM_FIRST && in opCanUseLiteralConstant()
2952 OpType <= AMDGPU::OPERAND_REG_IMM_LAST; in opCanUseLiteralConstant()
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| H A D | SIInstrInfo.h | 1090 uint8_t OpType = (Size == 8) ? in isInlineConstant() local
1092 return isInlineConstant(MO, OpType); in isInlineConstant()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | MatrixBuilder.h | 112 auto *OpType = cast<VectorType>(Matrix->getType()); variable
114 FixedVectorType::get(OpType->getElementType(), Rows * Columns);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFormats.td | 35 // counterpart. OpKey uniquely identifies <INSN>R, while OpType is
38 string OpType = "none";
143 let ColFields = ["OpType"];
2767 let OpType = "mem";
2779 let OpType = "mem";
3061 let OpType = "reg";
3070 let OpType = "reg";
3129 let OpType = "mem";
3179 let OpType = "mem";
3190 let OpType = "mem";
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| /freebsd/sys/contrib/dev/acpica/include/ |
| H A D | acparser.h | 292 UINT32 OpType);
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| H A D | acdebug.h | 210 UINT32 OpType))
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | StackMaps.h | 293 using OpType = enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp };
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 369 bool isExpr(unsigned OpType) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.h | 93 void printImmediateV216(uint32_t Imm, uint8_t OpType,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfoImpl.h | 854 Type *OpType = Type::getIntNTy(Context, OpSizeInBytes * 8); in getMemcpyLoopResidualLoweringType() local
856 OpsOut.push_back(OpType); in getMemcpyLoopResidualLoweringType()
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