/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | GuardWidening.cpp | 837 ConstantInt *OpRHS; in parseRangeChecks() local 846 if (match(Check.getBase(), m_Add(m_Value(OpLHS), m_ConstantInt(OpRHS)))) { in parseRangeChecks() 848 APInt NewOffset = Check.getOffsetValue() + OpRHS->getValue(); in parseRangeChecks() 852 m_Or(m_Value(OpLHS), m_ConstantInt(OpRHS)))) { in parseRangeChecks() 854 if ((OpRHS->getValue() & Known.Zero) == OpRHS->getValue()) { in parseRangeChecks() 856 APInt NewOffset = Check.getOffsetValue() + OpRHS->getValue(); in parseRangeChecks()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 4852 Register OpLHS, Register OpRHS, in tryReassocBinOp() argument 4854 LLT OpRHSTy = MRI.getType(OpRHS); in tryReassocBinOp() 4860 MachineInstr *OpRHSDef = MRI.getVRegDef(OpRHS); in tryReassocBinOp() 4873 auto NewCst = B.buildInstr(Opc, {OpRHSTy}, {OpLHSRHS, OpRHS}); in tryReassocBinOp() 4878 if (getTargetLowering().isReassocProfitable(MRI, OpLHS, OpRHS)) { in tryReassocBinOp() 4882 auto NewLHSLHS = B.buildInstr(Opc, {OpRHSTy}, {OpLHSLHS, OpRHS}); in tryReassocBinOp() 6489 Register X, Y, OpLHS, OpRHS; in matchRedundantBinOpInEquality() local 6498 m_any_of(m_GAdd(m_Reg(OpLHS), m_Reg(OpRHS)), in matchRedundantBinOpInEquality() 6499 m_GXor(m_Reg(OpLHS), m_Reg(OpRHS)))))) in matchRedundantBinOpInEquality() 6501 Y = X == OpLHS ? OpRHS : X == OpRHS ? OpLHS : Register(); in matchRedundantBinOpInEquality()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 12442 SDValue OpLHS = Other.getOperand(0), OpRHS = Other.getOperand(1); in visitVSELECT() local 12454 (OpLHS == CondLHS || OpRHS == CondLHS)) in visitVSELECT() 12455 return DAG.getNode(ISD::UADDSAT, DL, VT, OpLHS, OpRHS); in visitVSELECT() 12457 if (OpRHS.getOpcode() == CondRHS.getOpcode() && in visitVSELECT() 12458 (OpRHS.getOpcode() == ISD::BUILD_VECTOR || in visitVSELECT() 12459 OpRHS.getOpcode() == ISD::SPLAT_VECTOR) && in visitVSELECT() 12468 ISD::matchBinaryPredicate(OpRHS, CondRHS, MatchUADDSAT)) in visitVSELECT() 12469 return DAG.getNode(ISD::UADDSAT, DL, VT, OpLHS, OpRHS); in visitVSELECT() 12495 SDValue OpRHS = Other.getOperand(0).getOperand(1); in visitVSELECT() local 12496 if (LHS == OpLHS && RHS == OpRHS && LHS.getOpcode() == ISD::ZERO_EXTEND) in visitVSELECT() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 4196 SDValue OpRHS = Op.getOperand(1); in lowerADDSUBO_CARRY() local 4203 OpRHS, OpCarryIn); in lowerADDSUBO_CARRY() 12778 SDValue OpLHS, OpRHS; in GeneratePerfectShuffle() local 12781 OpRHS = GeneratePerfectShuffle(RHSID, V1, V2, PerfectShuffleTable[RHSID], LHS, in GeneratePerfectShuffle() 12827 return DAG.getNode(AArch64ISD::EXT, dl, VT, OpLHS, OpRHS, in GeneratePerfectShuffle() 12831 return DAG.getNode(AArch64ISD::UZP1, dl, VT, OpLHS, OpRHS); in GeneratePerfectShuffle() 12833 return DAG.getNode(AArch64ISD::UZP2, dl, VT, OpLHS, OpRHS); in GeneratePerfectShuffle() 12835 return DAG.getNode(AArch64ISD::ZIP1, dl, VT, OpLHS, OpRHS); in GeneratePerfectShuffle() 12837 return DAG.getNode(AArch64ISD::ZIP2, dl, VT, OpLHS, OpRHS); in GeneratePerfectShuffle() 12839 return DAG.getNode(AArch64ISD::TRN1, dl, VT, OpLHS, OpRHS); in GeneratePerfectShuffle() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 9776 SDValue OpLHS, OpRHS; in GeneratePerfectShuffle() local 9778 OpRHS = GeneratePerfectShuffle(PerfectShuffleTable[RHSID], LHS, RHS, DAG, dl); in GeneratePerfectShuffle() 9812 return BuildVSLDOI(OpLHS, OpRHS, 4, OpLHS.getValueType(), DAG, dl); in GeneratePerfectShuffle() 9814 return BuildVSLDOI(OpLHS, OpRHS, 8, OpLHS.getValueType(), DAG, dl); in GeneratePerfectShuffle() 9816 return BuildVSLDOI(OpLHS, OpRHS, 12, OpLHS.getValueType(), DAG, dl); in GeneratePerfectShuffle() 9820 OpRHS = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OpRHS); in GeneratePerfectShuffle() 9821 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs); in GeneratePerfectShuffle()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8491 SDValue OpLHS, OpRHS; in GeneratePerfectShuffle() local 8493 OpRHS = GeneratePerfectShuffle(PerfectShuffleTable[RHSID], LHS, RHS, DAG, dl); in GeneratePerfectShuffle() 8518 OpLHS, OpRHS, in GeneratePerfectShuffle() 8523 OpLHS, OpRHS).getValue(OpNum-OP_VUZPL); in GeneratePerfectShuffle() 8527 OpLHS, OpRHS).getValue(OpNum-OP_VZIPL); in GeneratePerfectShuffle() 8531 OpLHS, OpRHS).getValue(OpNum-OP_VTRNL); in GeneratePerfectShuffle()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 46448 SDValue OpRHS = CmpLHS.getOperand(2); in combineSetCCAtomicArith() local 46449 auto *OpRHSC = dyn_cast<ConstantSDNode>(OpRHS); in combineSetCCAtomicArith()
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