Searched refs:OpR (Results 1 – 6 of 6) sorted by relevance
148 auto *OpR = cast<DefInit>(MIOI->getArg(j))->getDef(); in GetOperandInfo() local149 OperandList.back().Rec = OpR; in GetOperandInfo()154 Record *OpR = OperandList[j].Rec; in GetOperandInfo() local157 if (OpR->isSubClassOf("RegisterOperand")) in GetOperandInfo()158 OpR = OpR->getValueAsDef("RegClass"); in GetOperandInfo()159 if (OpR->isSubClassOf("RegisterClass")) in GetOperandInfo()160 Res += getQualifiedName(OpR) + "RegClassID, "; in GetOperandInfo()161 else if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()162 Res += utostr(OpR->getValueAsInt("RegClassKind")) + ", "; in GetOperandInfo()171 if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()[all …]
309 auto *OpR = Op->getDefiningRecipe(); in collectEphemeralRecipesForVPlan() local310 if (!OpR || OpR->mayHaveSideEffects() || EphRecipes.contains(OpR)) in collectEphemeralRecipesForVPlan()317 EphRecipes.insert(OpR); in collectEphemeralRecipesForVPlan()318 Worklist.push_back(OpR); in collectEphemeralRecipesForVPlan()
927 Value *OpR = InstR->getOperand(i); in cmpBasicBlocks() local928 if (int Res = cmpValues(OpL, OpR)) in cmpBasicBlocks()931 assert(cmpTypes(OpL->getType(), OpR->getType()) == 0); in cmpBasicBlocks()
1394 const MachineOperand &OpR = secondRegMatch ? NOp0 : NOp1; in isLegalToPacketizeTogether() local1395 if (OpR.isReg() && PI->modifiesRegister(OpR.getReg(), HRI)) { in isLegalToPacketizeTogether()
2814 Value *OpL = nullptr, *OpR = nullptr;2827 auto RHS = m_LShr(m_Neg(m_Value(OpR)), m_SpecificInt(ShiftWidth));2830 return Signum.match(V) && OpL == OpR && Val.match(OpL);
2064 SDValue OpR = GetPromotedInteger(RHS); in SExtOrZExtPromotedOperands() local2073 DAG.computeKnownBits(OpR).countMaxActiveBits(); in SExtOrZExtPromotedOperands()2077 RHS = OpR; in SExtOrZExtPromotedOperands()2093 unsigned OpREffectiveBits = DAG.ComputeMaxSignificantBits(OpR); in SExtOrZExtPromotedOperands()2097 RHS = OpR; in SExtOrZExtPromotedOperands()