Searched refs:OpOpcode (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 5950 unsigned OpOpcode = N1.getNode()->getOpcode(); in getNode() local
5955 assert(OpOpcode == ISD::TargetConstant && in getNode()
6010 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) { in getNode()
6012 if (OpOpcode == ISD::ZERO_EXTEND) in getNode()
6014 return getNode(OpOpcode, DL, VT, N1.getOperand(0), Flags); in getNode()
6016 if (OpOpcode == ISD::UNDEF) in getNode()
6031 if (OpOpcode == ISD::ZERO_EXTEND) { // (zext (zext x)) -> (zext x) in getNode()
6036 if (OpOpcode == ISD::UNDEF) in getNode()
6044 if (OpOpcode == ISD::TRUNCATE) { in getNode()
6070 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || in getNode()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3623 unsigned OpOpcode = Op.getOpcode(); in LowerFP_TO_INT() local
3641 SDValue FpToInt32 = DAG.getNode(OpOpcode, DL, MVT::i32, Src); in LowerFP_TO_INT()
3652 SDValue FpToInt32 = DAG.getNode(OpOpcode, DL, MVT::i32, Src); in LowerFP_TO_INT()
3654 OpOpcode == ISD::FP_TO_SINT ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerFP_TO_INT()
3659 return LowerFP_TO_INT64(Op, DAG, OpOpcode == ISD::FP_TO_SINT); in LowerFP_TO_INT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17043 unsigned OpOpcode = Op.getNode()->getOpcode(); in PerformVMulVCTPCombine() local
17045 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVMulVCTPCombine()
17082 bool isSigned = OpOpcode == ISD::SINT_TO_FP; in PerformVMulVCTPCombine()
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