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Searched refs:OpMask (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeEmitterGen.cpp246 uint64_t OpMask = ~(uint64_t)0 >> (64 - N); in addCodeToMergeInOperand() local
248 OpMask <<= OpShift; in addCodeToMergeInOperand()
249 MaskStr = "UINT64_C(" + utostr(OpMask) + ")"; in addCodeToMergeInOperand()
H A DAsmMatcherEmitter.cpp1504 for (const auto [CI, OpMask] : OpClassMask) { in buildOperandMatchInfo()
1506 OperandMatchEntry::create(MI.get(), CI, OpMask)); in buildOperandMatchInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLatencyMutations.cpp655 unsigned OpMask = II->getAddressOpMask(DstOpcode) >> 1; in modifyBypasses() local
656 for (unsigned i = 1; OpMask; ++i, OpMask >>= 1) { in modifyBypasses()
657 if ((OpMask & 1) && DstMI->getOperand(i).isReg() && in modifyBypasses()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp503 const unsigned OpMask = SEOp == Mips::SEH ? 0xffff : 0xff; in expandAtomicBinOpSubword() local
506 .addImm(OpMask); in expandAtomicBinOpSubword()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp41218 SmallVector<int, 64> OpMask; in combineX86ShufflesRecursively() local
41221 if (getTargetShuffleInputs(Op, OpDemandedElts, OpInputs, OpMask, OpUndef, in combineX86ShufflesRecursively()
41236 OpMask.assign(NumElts, SM_SentinelUndef); in combineX86ShufflesRecursively()
41237 std::iota(OpMask.begin(), OpMask.end(), ExtractIdx); in combineX86ShufflesRecursively()
41247 unsigned OpMaskSize = OpMask.size(); in combineX86ShufflesRecursively()
41250 for (int &M : OpMask) { in combineX86ShufflesRecursively()
41260 OpMask.append((NumSubVecs - 1) * OpMaskSize, SM_SentinelUndef); in combineX86ShufflesRecursively()
41274 for (int i = 0, e = OpMask.size(); i != e; ++i) { in combineX86ShufflesRecursively()
41275 int M = OpMask[i]; in combineX86ShufflesRecursively()
41278 UsedInputs.setBit(M / OpMask.size()); in combineX86ShufflesRecursively()
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