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Searched refs:OpIndices (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.h54 ArrayRef<unsigned> OpIndices) const;
64 ArrayRef<unsigned> OpIndices) const;
H A DSIInstrInfo.h179 Register findUsedSGPR(const MachineInstr &MI, int OpIndices[3]) const;
H A DAMDGPURegisterBankInfo.cpp987 MachineRegisterInfo &MRI, ArrayRef<unsigned> OpIndices) const { in collectWaterfallOperands()
988 for (unsigned Op : OpIndices) { in collectWaterfallOperands()
1001 MachineIRBuilder &B, MachineInstr &MI, ArrayRef<unsigned> OpIndices) const { in executeInWaterfallLoop()
1006 if (!collectWaterfallOperands(SGPROperandRegs, MI, *B.getMRI(), OpIndices)) in executeInWaterfallLoop()
H A DSIInstrInfo.cpp8493 int OpIndices[3]) const { in findUsedSGPR()
8513 int Idx = OpIndices[i]; in findUsedSGPR()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenSchedule.cpp355 std::vector<int64_t> OpIndices = in processSTIPredicate() local
357 APInt OperandMask = constructOperandMask(OpIndices); in processSTIPredicate()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3740 OperandIndices OpIndices = getSrcOperandIndices(Opcode); in validateConstantBusLimitations() local
3742 for (int OpIdx : OpIndices) { in validateConstantBusLimitations()
4498 const int OpIndices[] = { Src0Idx, Src1Idx }; in validateSOPLiteral() local
4504 for (int OpIdx : OpIndices) { in validateSOPLiteral()
4659 OperandIndices OpIndices = getSrcOperandIndices(Opcode, HasMandatoryLiteral); in validateVOPLiteral() local
4665 for (int OpIdx : OpIndices) { in validateVOPLiteral()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp1758 auto *OpIndices = II.getOperand(1); in instCombineSVETBL() local
1763 auto *SplatValue = dyn_cast_or_null<ConstantInt>(getSplatValue(OpIndices)); in instCombineSVETBL()