| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 67 bool expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI);
148 bool AVRExpandPseudo::expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, in expandArith() argument
167 buildMI(MBB, MBBI, OpHi) in expandArith()
367 unsigned OpHi = AVR::SBCIRdK; in expand() local
380 buildMI(MBB, MBBI, OpHi) in expand()
429 unsigned OpHi = AVR::COMRd; in expand() local
441 buildMI(MBB, MBBI, OpHi) in expand()
501 unsigned OpHi = AVR::CPCRdRr; in expand() local
510 auto MIBHI = buildMI(MBB, MBBI, OpHi) in expand()
534 unsigned OpHi = AVR::CPCRdRr; in expand() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1851 SDValue OpHi = Op; in SplitVecRes_StrictFPOp() local
1858 GetSplitVector(Op, OpLo, OpHi); in SplitVecRes_StrictFPOp()
1860 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i); in SplitVecRes_StrictFPOp()
1864 OpsHi[i] = OpHi; in SplitVecRes_StrictFPOp()
3337 SDValue OpLo, OpHi; in SplitVecRes_VECTOR_DEINTERLEAVE() local
3338 GetSplitVector(N->getOperand(i), OpLo, OpHi); in SplitVecRes_VECTOR_DEINTERLEAVE()
3340 Ops[i * 2 + 1] = OpHi; in SplitVecRes_VECTOR_DEINTERLEAVE()
3360 SDValue OpLo, OpHi; in SplitVecRes_VECTOR_INTERLEAVE() local
3361 GetSplitVector(N->getOperand(i), OpLo, OpHi); in SplitVecRes_VECTOR_INTERLEAVE()
3363 Ops[i + Factor] = OpHi; in SplitVecRes_VECTOR_INTERLEAVE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1959 const MachineOperand &OpHi = LoIs1 ? MI.getOperand(3) : MI.getOperand(1); in evaluate() local
1961 RegSubRegPair SrcRL(getRegSubRegPair(OpLo)), SrcRH(getRegSubRegPair(OpHi)); in evaluate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 2460 MachineOperand OpHi = MI.getOperand(2); in expandPostRAPseudo() local
2490 if (OpHi.isGlobal()) in expandPostRAPseudo()
2491 OpHi.setOffset(OpHi.getOffset() + Adjust + 12); in expandPostRAPseudo()
2494 .add(OpHi)); in expandPostRAPseudo()
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| H A D | SIISelLowering.cpp | 6039 SDValue OpHi = DAG.getNode(Opc, SL, Hi.getValueType(), Hi, Op->getFlags()); in splitUnaryVectorOp() local
6041 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitUnaryVectorOp()
6064 SDValue OpHi = in splitBinaryVectorOp() local
6067 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitBinaryVectorOp()
6094 SDValue OpHi = in splitTernaryVectorOp() local
6097 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitTernaryVectorOp()
7036 SDValue OpHi = DAG.getNode(Opc, DL, HalfDstVT, Hi, Flags); in splitFP_ROUNDVectorOp() local
7038 return DAG.getNode(ISD::CONCAT_VECTORS, DL, DstVT, OpLo, OpHi); in splitFP_ROUNDVectorOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20921 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend() local
20922 OpHi = DAG.getBitcast(HalfVT, OpHi); in LowerAVXExtend()
20924 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerAVXExtend()
21496 SDValue OpHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, in LowerTRUNCATE() local
21500 DAG.getBitcast(MVT::v4i32, OpHi), ShufMask); in LowerTRUNCATE()
25447 SDValue OpHi = DAG.getVectorShuffle(InVT, dl, In, In, ShufMask); in LowerSIGN_EXTEND() local
25448 OpHi = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, HalfVT, OpHi); in LowerSIGN_EXTEND()
25450 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerSIGN_EXTEND()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11868 auto [OpLo, OpHi] = DAG.SplitVectorOperand(Op.getNode(), i); in lowerVECTOR_DEINTERLEAVE()
11870 Ops[i * 2 + 1] = OpHi; in lowerVECTOR_DEINTERLEAVE()
12060 auto [OpLo, OpHi] = DAG.SplitVectorOperand(Op.getNode(), i); in lowerVECTOR_INTERLEAVE()
12062 Ops[i + Factor] = OpHi; in lowerVECTOR_INTERLEAVE()
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