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Searched refs:OpDemandedElts (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp3314 APInt OpDemandedElts(InnerVWidth, 0); in simplifyDemandedVectorEltsIntrinsic() local
3320 OpDemandedElts.setBit((Lane * InnerVWidthPerLane) + Elt); in simplifyDemandedVectorEltsIntrinsic()
3326 simplifyAndSetOp(&II, OpNum, OpDemandedElts, OpUndefElts); in simplifyDemandedVectorEltsIntrinsic()
3350 APInt OpDemandedElts = APIntOps::ScaleBitMask(DemandedElts, InnerVWidth); in simplifyDemandedVectorEltsIntrinsic() local
3353 simplifyAndSetOp(&II, 0, OpDemandedElts, Op0UndefElts); in simplifyDemandedVectorEltsIntrinsic()
3354 simplifyAndSetOp(&II, 1, OpDemandedElts, Op1UndefElts); in simplifyDemandedVectorEltsIntrinsic()
H A DX86ISelLowering.cpp39734 APInt OpDemandedElts = APInt::getZero(RootMask.size()); in combineX86ShufflesRecursively() local
39738 OpDemandedElts.setBit(M - BaseIdx); in combineX86ShufflesRecursively()
39745 assert(OpDemandedElts in combineX86ShufflesRecursively()
39749 OpDemandedElts = OpDemandedElts.extractBits(NumOpMaskElts, 0); in combineX86ShufflesRecursively()
39751 OpDemandedElts = in combineX86ShufflesRecursively()
39752 APIntOps::ScaleBitMask(OpDemandedElts, VT.getVectorNumElements()); in combineX86ShufflesRecursively()
39759 if (getTargetShuffleInputs(Op, OpDemandedElts, OpInputs, OpMask, OpUndef, in combineX86ShufflesRecursively()
40044 APInt OpDemandedElts(Mask.size(), 0); in combineX86ShufflesRecursively() local
40048 OpDemandedElts.setBit(OpEltIdx); in combineX86ShufflesRecursively()
40058 assert(!OpDemandedElts.extractBits( in combineX86ShufflesRecursively()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp25289 for (APInt &OpDemandedElts : OpsDemandedElts) in combineShuffleToZeroExtendVectorInReg()
25290 OpDemandedElts = APInt::getZero(NumElts); in combineShuffleToZeroExtendVectorInReg()