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Searched refs:OpDef (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp141 DefInit *OpDef = dyn_cast<DefInit>(Dag->getOperator()); in evaluateExpansion() local
142 if (!OpDef) { in evaluateExpansion()
148 Record *Operator = OpDef->getDef(); in evaluateExpansion()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVInstructionSelector.cpp1433 SPIRVType *OpDef = MRI->getVRegDef(OpReg); in getArrayComponentCount() local
1434 if (!OpDef) in getArrayComponentCount()
1436 if (OpDef->getOpcode() == SPIRV::ASSIGN_TYPE && in getArrayComponentCount()
1437 OpDef->getOperand(1).isReg()) { in getArrayComponentCount()
1438 if (SPIRVType *RefDef = MRI->getVRegDef(OpDef->getOperand(1).getReg())) in getArrayComponentCount()
1439 OpDef = RefDef; in getArrayComponentCount()
1441 unsigned N = OpDef->getOpcode() == TargetOpcode::G_CONSTANT in getArrayComponentCount()
1442 ? OpDef->getOperand(1).getCImm()->getValue().getZExtValue() in getArrayComponentCount()
1448 static bool isConstReg(MachineRegisterInfo *MRI, SPIRVType *OpDef, in isConstReg() argument
1450 if (OpDef->getOpcode() == SPIRV::ASSIGN_TYPE && in isConstReg()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCOptAddrMode.cpp419 MachineInstr *OpDef = MRI->getVRegDef(O.getReg()); in canHoistLoadStoreTo() local
420 if (!OpDef || !MDT->dominates(OpDef, To)) in canHoistLoadStoreTo()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/
H A DPatterns.cpp580 const auto *OpDef = Alt.OpTable.getDef(Op.Name); in checkSemantics() local
581 if (!OpDef) { in checkSemantics()
588 if (Op.Kind == PK_Root && OpDef->getNumInstDefs() != 1) { in checkSemantics()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenDAGPatterns.cpp2900 DefInit *OpDef = dyn_cast<DefInit>(Dag->getOperator()); in ParseTreePattern() local
2901 if (!OpDef) { in ParseTreePattern()
2905 Record *Operator = OpDef->getDef(); in ParseTreePattern()
3709 DefInit *OpDef = dyn_cast<DefInit>(DI->getOperator()); in hasNullFragReference() local
3710 if (!OpDef) in hasNullFragReference()
3712 Record *Operator = OpDef->getDef(); in hasNullFragReference()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanTransforms.cpp1587 if (VPRecipeBase *OpDef = operand->getDefiningRecipe()) in dropPoisonGeneratingRecipes() local
1588 Worklist.push_back(OpDef); in dropPoisonGeneratingRecipes()
H A DSLPVectorizer.cpp3724 doForAllOpcodes(I, [&ReadyList](ScheduleData *OpDef) { in schedule() argument
3725 if (OpDef && OpDef->hasValidDependencies() && in schedule()
3726 OpDef->incrementUnscheduledDeps(-1) == 0) { in schedule()
3730 ScheduleData *DepBundle = OpDef->FirstInBundle; in schedule()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp2728 const MachineInstr *OpDef = MRI.getUniqueVRegDef(GEPOp.getReg()); in getAddrModeInfo() local
2729 assert(OpDef); in getAddrModeInfo()
2730 if (i == 2 && isConstant(*OpDef)) { in getAddrModeInfo()
2734 GEPInfo.Imm = OpDef->getOperand(1).getCImm()->getSExtValue(); in getAddrModeInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp7887 auto *OpDef = MRI.getVRegDef(OpReg); in fixupPHIOpBanks() local
7889 MachineBasicBlock &OpDefBB = *OpDef->getParent(); in fixupPHIOpBanks()
7893 MachineBasicBlock::iterator InsertPt = std::next(OpDef->getIterator()); in fixupPHIOpBanks()
7896 MIB.setInsertPt(*OpDef->getParent(), InsertPt); in fixupPHIOpBanks()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp7386 auto *OpDef = dyn_cast<Instruction>(NI->getOperand(I)); in tryToSinkFreeOperands() local
7387 if (!OpDef) in tryToSinkFreeOperands()
7389 FreshBBs.insert(OpDef->getParent()); in tryToSinkFreeOperands()