Searched refs:OpBank (Results 1 – 3 of 3) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterBankInfo.cpp | 882 const RegisterBank *OpBank = getRegBank(OpReg, MRI, *TRI); in executeInWaterfallLoop() local 883 if (OpBank != &AMDGPU::VGPRRegBank) { in executeInWaterfallLoop() 991 const RegisterBank *OpBank = getRegBank(Reg, MRI, *TRI); in collectWaterfallOperands() local 992 if (OpBank->getID() != AMDGPU::SGPRRegBankID) in collectWaterfallOperands() 3771 auto OpBank = getRegBankID(MI.getOperand(I).getReg(), MRI); in getInstrMapping() local 3774 if (OpBank != AMDGPU::SGPRRegBankID) { in getInstrMapping() 3810 unsigned OpBank = Bank->getID(); in getInstrMapping() local 3811 ResultBank = regBankBoolUnion(ResultBank, OpBank); in getInstrMapping() 5201 auto OpBank = getRegBankID(Reg, MRI); in getInstrMapping() local 5203 OpdsMapping[I] = AMDGPU::getValueMapping(OpBank, Size); in getInstrMapping()
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H A D | AMDGPUInstructionSelector.cpp | 2737 const RegisterBank *OpBank = RBI.getRegBank(GEPOp.getReg(), MRI, TRI); in getAddrModeInfo() local 2738 if (OpBank->getID() == AMDGPU::SGPRRegBankID) in getAddrModeInfo()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 794 const RegisterBank *OpBank = RBI.getRegBank(MO.getReg(), MRI, TRI); in unsupportedBinOp() local 795 if (!OpBank) { in unsupportedBinOp() 800 if (PrevOpBank && OpBank != PrevOpBank) { in unsupportedBinOp() 804 PrevOpBank = OpBank; in unsupportedBinOp()
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