Searched refs:Op1Ty (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 1183 const LLT Op0Ty, const LLT Op1Ty) { in validateSelectOp() argument
1187 assert((ResTy == Op0Ty && ResTy == Op1Ty) && "type mismatch"); in validateSelectOp()
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| H A D | LegalizerHelper.cpp | 8470 auto [DstReg, DstTy, MaskReg, MaskTy, Op1Reg, Op1Ty, Op2Reg, Op2Ty] = in lowerSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4495 const LLT Op1Ty = MRI.getType(Op1); in emitVectorConcat() local
4498 if (Op1Ty != Op2Ty) { in emitVectorConcat()
4502 assert(Op1Ty.isVector() && "Expected a vector for vector concat"); in emitVectorConcat()
4504 if (Op1Ty.getSizeInBits() >= 128) { in emitVectorConcat()
4510 if (Op1Ty.getSizeInBits() != 64) { in emitVectorConcat()
4515 const LLT ScalarTy = LLT::scalar(Op1Ty.getSizeInBits()); in emitVectorConcat()
4518 getRegClassForTypeOnBank(Op1Ty.multiplyElements(2), FPRBank); in emitVectorConcat()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 5865 Type *Op1Ty = Op1->getOperand(0)->getType(); in getReductionPatternCost() local
5867 Op0Ty->getIntegerBitWidth() < Op1Ty->getIntegerBitWidth() ? Op1Ty in getReductionPatternCost()
5878 Op1->getOpcode(), VectorTy, VectorType::get(Op1Ty, VectorTy), in getReductionPatternCost()
5886 if (Op0Ty != LargestOpTy || Op1Ty != LargestOpTy) { in getReductionPatternCost()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 238 const LLT Op1Ty);
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Verifier.cpp | 4023 Type *Op1Ty = IC.getOperand(1)->getType(); in visitICmpInst() local
4024 Check(Op0Ty == Op1Ty, in visitICmpInst()
4038 Type *Op1Ty = FC.getOperand(1)->getType(); in visitFCmpInst() local
4039 Check(Op0Ty == Op1Ty, in visitFCmpInst()
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