| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaUtils.cpp | 17 bool isValidAddrOffset(int Scale, int64_t OffsetVal) { in isValidAddrOffset() argument
22 Valid = (OffsetVal >= 0 && OffsetVal <= 255); in isValidAddrOffset()
25 Valid = (OffsetVal >= 0 && OffsetVal <= 510) && ((OffsetVal & 0x1) == 0); in isValidAddrOffset()
28 Valid = (OffsetVal >= 0 && OffsetVal <= 1020) && ((OffsetVal & 0x3) == 0); in isValidAddrOffset()
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| H A D | XtensaISelDAGToDAG.cpp | 65 int64_t OffsetVal = CN->getSExtValue(); in selectMemRegAddr() local
67 Valid = isValidAddrOffset(Scale, OffsetVal); in selectMemRegAddr()
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| H A D | XtensaUtils.h | 22 bool isValidAddrOffset(int Scale, int64_t OffsetVal);
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCObjectStreamer.cpp | 633 MCValue OffsetVal; in getOffsetAndDataFragment() local
634 if(!SymbolExpr->evaluateAsRelocatable(OffsetVal, nullptr, nullptr)) in getOffsetAndDataFragment()
638 if (OffsetVal.isAbsolute()) { in getOffsetAndDataFragment()
639 RelocOffset = OffsetVal.getConstant(); in getOffsetAndDataFragment()
651 if (OffsetVal.getSymB()) in getOffsetAndDataFragment()
656 const MCSymbolRefExpr &SRE = cast<MCSymbolRefExpr>(*OffsetVal.getSymA()); in getOffsetAndDataFragment()
674 RelocOffset = SRE.getSymbol().getOffset() + OffsetVal.getConstant(); in getOffsetAndDataFragment()
707 MCValue OffsetVal; in emitRelocDirective() local
708 if (!Offset.evaluateAsRelocatable(OffsetVal, nullptr, nullptr)) in emitRelocDirective()
711 if (OffsetVal.isAbsolute()) { in emitRelocDirective()
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | AccelTable.h | 301 : OffsetVal(DieOffset), ParentOffset(DefiningParentOffset),
310 return std::get<uint64_t>(OffsetVal);
322 const DIE *Entry = std::get<const DIE *>(OffsetVal);
324 OffsetVal = Entry->getOffset();
327 return std::holds_alternative<uint64_t>(OffsetVal);
354 std::variant<const DIE *, uint64_t> OffsetVal;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 631 uint32_t OffsetVal = Offset->getZExtValue(); in Select() local
634 ReplaceNode(N, getBFE32(Signed, SDLoc(N), N->getOperand(0), OffsetVal, in Select()
1641 int64_t OffsetVal = 0; in SelectFlatOffsetImpl() local
1660 OffsetVal = COffsetVal; in SelectFlatOffsetImpl()
1675 std::tie(OffsetVal, RemainderOffset) = in SelectFlatOffsetImpl()
1729 Offset = CurDAG->getTargetConstant(OffsetVal, SDLoc(), MVT::i32); in SelectFlatOffsetImpl()
2550 const APInt &OffsetVal = PtrOffset->getAsAPIntVal(); in SelectDSAppendConsume() local
2551 if (isDSOffsetLegal(PtrBase, OffsetVal.getZExtValue())) { in SelectDSAppendConsume()
2553 Offset = CurDAG->getTargetConstant(OffsetVal, SDLoc(), MVT::i32); in SelectDSAppendConsume()
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| H A D | AMDGPUInstructionSelector.cpp | 5279 std::optional<int64_t> OffsetVal = getIConstantVRegSExtVal(Reg, MRI); in getConstantZext32Val() local
5280 if (!OffsetVal || !isInt<32>(*OffsetVal)) in getConstantZext32Val()
5282 return Lo_32(*OffsetVal); in getConstantZext32Val()
5287 std::optional<uint64_t> OffsetVal = getConstantZext32Val(Root.getReg(), *MRI); in selectSMRDBufferImm() local
5288 if (!OffsetVal) in selectSMRDBufferImm()
5292 AMDGPU::getSMRDEncodedOffset(STI, *OffsetVal, true); in selectSMRDBufferImm()
5303 std::optional<uint64_t> OffsetVal = getConstantZext32Val(Root.getReg(), *MRI); in selectSMRDBufferImm32() local
5304 if (!OffsetVal) in selectSMRDBufferImm32()
5308 AMDGPU::getSMRDEncodedLiteralOffset32(STI, *OffsetVal); in selectSMRDBufferImm32()
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| H A D | AMDGPUISelLowering.cpp | 5174 uint32_t OffsetVal = Offset->getZExtValue() & 0x1f; in PerformDAGCombine() local
5178 if (OffsetVal == 0) { in PerformDAGCombine()
5205 OffsetVal, in PerformDAGCombine()
5212 OffsetVal, in PerformDAGCombine()
5217 if ((OffsetVal + WidthVal) >= 32 && in PerformDAGCombine()
5218 !(Subtarget->hasSDWA() && OffsetVal == 16 && WidthVal == 16)) { in PerformDAGCombine()
5219 SDValue ShiftVal = DAG.getConstant(OffsetVal, DL, MVT::i32); in PerformDAGCombine()
5226 OffsetVal, in PerformDAGCombine()
5227 OffsetVal + WidthVal); in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 2111 unsigned OffsetVal = Offset->getAsZExtVal(); in tryLoadParam() local
2114 Ops.push_back(CurDAG->getTargetConstant(OffsetVal, DL, MVT::i32)); in tryLoadParam()
2126 unsigned OffsetVal = Offset->getAsZExtVal(); in tryStoreRetval() local
2149 Ops.push_back(CurDAG->getTargetConstant(OffsetVal, DL, MVT::i32)); in tryStoreRetval()
2304 unsigned OffsetVal = Offset->getAsZExtVal(); in tryStoreParam() local
2331 Ops.push_back(CurDAG->getTargetConstant(OffsetVal, DL, MVT::i32)); in tryStoreParam()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AccelTable.cpp | 369 : OffsetVal(&Die), DieTag(Die.getTag()), AbbrevNumber(0), IsTU(IsTU), in DWARF5AccelTableData()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 7864 int64_t OffsetVal; in parseDirectiveCPSetup() local
7868 !OffsetExpr->evaluateAsAbsolute(OffsetVal)) { in parseDirectiveCPSetup()
7873 Save = OffsetVal; in parseDirectiveCPSetup()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1648 int OffsetVal = (int)OffsetOp->getZExtValue(); in tryIndexedLoad() local
1650 SDValue Offset = CurDAG->getTargetConstant(OffsetVal, dl, MVT::i64); in tryIndexedLoad()
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| H A D | AArch64InstrFormats.td | 1557 class UImmScaledMemoryIndexedRange<int Width, int Scale, int OffsetVal> : AsmOperandClass {
1561 …let PredicateMethod = "isUImmScaled<" # Width # ", " # Scale # ", " # OffsetVal # ", /*IsRange=*/t…
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 7676 SDValue OffsetVal = in visitIntrinsicCall() local
7680 SDValue Add = DAG.getMemBasePlusOffset(FPVal, OffsetVal, sdl); in visitIntrinsicCall()
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