| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 223 const MCOperand &OffsetOp, in printMemoryImmediateOffset() argument
225 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected"); in printMemoryImmediateOffset()
226 if (OffsetOp.isImm()) { in printMemoryImmediateOffset()
227 assert(isInt<SizeInBits>(OffsetOp.getImm()) && "Constant value truncated"); in printMemoryImmediateOffset()
228 OS << OffsetOp.getImm(); in printMemoryImmediateOffset()
230 MAI.printExpr(OS, *OffsetOp.getExpr()); in printMemoryImmediateOffset()
236 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local
241 printMemoryImmediateOffset<16>(MAI, OffsetOp, OS); in printMemRiOperand()
250 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local
253 assert(OffsetOp.isReg() && RegOp.isReg() && "Registers expected."); in printMemRrOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 178 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemri() local
184 if (OffsetOp.isImm()) { in printMemri()
185 int64_t Offset = OffsetOp.getImm(); in printMemri()
191 } else if (OffsetOp.isExpr()) { in printMemri()
192 MAI.printExpr(O, *OffsetOp.getExpr()); in printMemri()
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| H A D | AVRMCCodeEmitter.cpp | 145 auto OffsetOp = MI.getOperand(OpNo + 1); in encodeMemri() local
165 if (OffsetOp.isImm()) { in encodeMemri()
166 OffsetBits = OffsetOp.getImm(); in encodeMemri()
167 } else if (OffsetOp.isExpr()) { in encodeMemri()
169 addFixup(Fixups, 0, OffsetOp.getExpr(), AVR::fixup_6); in encodeMemri()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFInstPrinter.cpp | 51 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand() local
58 if (OffsetOp.isImm()) { in printMemOperand()
59 auto Imm = OffsetOp.getImm(); in printMemOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 121 Register OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local
124 OffsetOp) in eliminateFrameIndex()
131 .addReg(OffsetOp); in eliminateFrameIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 171 const MachineOperand &OffsetOp = MI.getOperand(3); in canRemoveAddasl() local
172 if (!OffsetOp.isImm() || OffsetOp.getImm() > 3) in canRemoveAddasl()
719 MachineOperand OffsetOp = MI->getOperand(getOffsetOpPosition(MI)); in processAddUses() local
720 if (!OffsetOp.isImm()) in processAddUses()
723 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm(); in processAddUses()
781 MachineOperand &OffsetOp = UseMI->getOperand(getOffsetOpPosition(UseMI)); in updateAddUses() local
785 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
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| H A D | HexagonInstrInfo.cpp | 2053 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getIncrementValue() local
2054 if (OffsetOp.isImm()) { in getIncrementValue()
2055 Value = OffsetOp.getImm(); in getIncrementValue()
3314 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getBaseAndOffset() local
3315 if (!OffsetOp.isImm()) in getBaseAndOffset()
3317 Offset = OffsetOp.getImm(); in getBaseAndOffset()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 1944 OffsetOpTy OffsetOp; member
1946 PtrAdd_match(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp) in PtrAdd_match()
1947 : PointerOp(PointerOp), OffsetOp(OffsetOp) {} in PtrAdd_match()
1953 OffsetOp.match(GEP->idx_begin()->get()); in match()
1993 m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp) { in m_PtrAdd() argument
1994 return PtrAdd_match<PointerOpTy, OffsetOpTy>(PointerOp, OffsetOp); in m_PtrAdd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 1112 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() local
1113 int64_t NewOffset = OffsetOp->getImm() + Offset; in resolveFrameIndex()
1123 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
1135 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
2925 MachineOperand *OffsetOp = in eliminateFrameIndex() local
2927 int64_t NewOffset = Offset + OffsetOp->getImm(); in eliminateFrameIndex()
2930 OffsetOp->setImm(NewOffset); in eliminateFrameIndex()
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| H A D | SIInstrInfo.cpp | 371 const MachineOperand *BaseOp, *OffsetOp; in getMemOperandsWithOffsetWidth() local
376 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth()
377 if (OffsetOp) { in getMemOperandsWithOffsetWidth()
385 Offset = OffsetOp->getImm(); in getMemOperandsWithOffsetWidth()
496 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth()
497 Offset = OffsetOp ? OffsetOp->getImm() : 0; in getMemOperandsWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 1646 const MachineOperand &OffsetOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local
1647 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction()
1657 if (DstSize + OffsetOp.getImm() > SrcSize) in verifyPreISelGenericInstruction()
1668 const MachineOperand &OffsetOp = MI->getOperand(3); in verifyPreISelGenericInstruction() local
1669 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction()
1680 if (SrcSize + OffsetOp.getImm() > DstSize) in verifyPreISelGenericInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3699 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst() local
3729 if (OffsetOp.isImm()) { in expandMem16Inst()
3730 int64_t LoOffset = OffsetOp.getImm() & 0xffff; in expandMem16Inst()
3731 int64_t HiOffset = OffsetOp.getImm() & ~0xffff; in expandMem16Inst()
3741 bool Is32BitImm = isInt<32>(OffsetOp.getImm()); in expandMem16Inst()
3754 if (OffsetOp.isExpr()) { in expandMem16Inst()
3763 if (!OffsetOp.getExpr()->evaluateAsRelocatable(Res, nullptr)) { in expandMem16Inst()
3782 const MCExpr *OffExpr = OffsetOp.getExpr(); in expandMem16Inst()
3827 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst() local
3858 if (OffsetOp.isImm()) { in expandMem9Inst()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2563 const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1); in emitEpilogue() local
2567 if (OffsetOp.getImm() == 0 && AfterCSRPopSize >= 0) { in emitEpilogue()
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| H A D | AArch64ISelDAGToDAG.cpp | 1594 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); in tryIndexedLoad() local
1595 int OffsetVal = (int)OffsetOp->getZExtValue(); in tryIndexedLoad()
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| H A D | AArch64ISelLowering.cpp | 24213 SDValue OffsetOp = Add.getOperand(1); in foldIndexIntoBase() local
24215 if (auto Offset = DAG.getSplatValue(OffsetOp)) { in foldIndexIntoBase()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 5850 using OffsetOp = std::pair<Instruction::BinaryOps, Value *>; typedef
5851 static void collectOffsetOp(Value *V, SmallVectorImpl<OffsetOp> &Offsets, in collectOffsetOp()
5920 SmallVector<OffsetOp, 4> OffsetOps; in foldICmpEqualityWithOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 9444 SDValue OffsetOp) { in InferPointerInfo() argument
9446 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) in InferPointerInfo()
9448 if (OffsetOp.isUndef()) in InferPointerInfo()
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| H A D | DAGCombiner.cpp | 9214 auto OffsetOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); in calculateByteProvider() local
9215 if (!OffsetOp) in calculateByteProvider()
9218 VectorIndex = OffsetOp->getZExtValue(); in calculateByteProvider()
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