| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 227 const MCOperand &OffsetOp, in printMemoryImmediateOffset() argument
229 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected"); in printMemoryImmediateOffset()
230 if (OffsetOp.isImm()) { in printMemoryImmediateOffset()
231 assert(isInt<SizeInBits>(OffsetOp.getImm()) && "Constant value truncated"); in printMemoryImmediateOffset()
232 OS << OffsetOp.getImm(); in printMemoryImmediateOffset()
234 OffsetOp.getExpr()->print(OS, &MAI); in printMemoryImmediateOffset()
241 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local
246 printMemoryImmediateOffset<16>(MAI, OffsetOp, OS); in printMemRiOperand()
256 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local
259 assert(OffsetOp.isReg() && RegOp.isReg() && "Registers expected."); in printMemRrOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 178 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemri() local
184 if (OffsetOp.isImm()) { in printMemri()
185 int64_t Offset = OffsetOp.getImm(); in printMemri()
191 } else if (OffsetOp.isExpr()) { in printMemri()
192 O << *OffsetOp.getExpr(); in printMemri()
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| H A D | AVRMCCodeEmitter.cpp | 141 auto OffsetOp = MI.getOperand(OpNo + 1); in encodeMemri() local
161 if (OffsetOp.isImm()) { in encodeMemri()
162 OffsetBits = OffsetOp.getImm(); in encodeMemri()
163 } else if (OffsetOp.isExpr()) { in encodeMemri()
165 Fixups.push_back(MCFixup::create(0, OffsetOp.getExpr(), in encodeMemri()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFInstPrinter.cpp | 73 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand()
80 if (OffsetOp.isImm()) { in printMemOperand()
81 auto Imm = OffsetOp.getImm(); in printMemOperand()
70 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); printMemOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 123 Register OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local
126 OffsetOp) in eliminateFrameIndex()
133 .addReg(OffsetOp); in eliminateFrameIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 166 const MachineOperand &OffsetOp = MI.getOperand(3); in canRemoveAddasl() local
167 if (!OffsetOp.isImm() || OffsetOp.getImm() > 3) in canRemoveAddasl()
437 MachineOperand OffsetOp = MI->getOperand(getOffsetOpPosition(MI)); in processAddUses() local
438 if (!OffsetOp.isImm()) in processAddUses()
441 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm(); in processAddUses()
499 MachineOperand &OffsetOp = UseMI->getOperand(getOffsetOpPosition(UseMI)); in updateAddUses() local
503 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
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| H A D | HexagonInstrInfo.cpp | 2050 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getIncrementValue() local
2051 if (OffsetOp.isImm()) { in getIncrementValue()
2052 Value = OffsetOp.getImm(); in getIncrementValue()
3310 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getBaseAndOffset() local
3311 if (!OffsetOp.isImm()) in getBaseAndOffset()
3313 Offset = OffsetOp.getImm(); in getBaseAndOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 899 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() local
900 int64_t NewOffset = OffsetOp->getImm() + Offset; in resolveFrameIndex()
910 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
922 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
2287 MachineOperand *OffsetOp = in eliminateFrameIndex() local
2289 int64_t NewOffset = Offset + OffsetOp->getImm(); in eliminateFrameIndex()
2292 OffsetOp->setImm(NewOffset); in eliminateFrameIndex()
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| H A D | SIInstrInfo.cpp | 365 const MachineOperand *BaseOp, *OffsetOp; in getMemOperandsWithOffsetWidth() local
370 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth()
371 if (OffsetOp) { in getMemOperandsWithOffsetWidth()
379 Offset = OffsetOp->getImm(); in getMemOperandsWithOffsetWidth()
486 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth()
487 Offset = OffsetOp ? OffsetOp->getImm() : 0; in getMemOperandsWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 1833 OffsetOpTy OffsetOp; member
1835 PtrAdd_match(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp) in PtrAdd_match()
1836 : PointerOp(PointerOp), OffsetOp(OffsetOp) {} in PtrAdd_match()
1842 OffsetOp.match(GEP->idx_begin()->get()); in match()
1882 m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp) { in m_PtrAdd() argument
1883 return PtrAdd_match<PointerOpTy, OffsetOpTy>(PointerOp, OffsetOp); in m_PtrAdd()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 1584 const MachineOperand &OffsetOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local
1585 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction()
1595 if (DstSize + OffsetOp.getImm() > SrcSize) in verifyPreISelGenericInstruction()
1606 const MachineOperand &OffsetOp = MI->getOperand(3); in verifyPreISelGenericInstruction() local
1607 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction()
1618 if (SrcSize + OffsetOp.getImm() > DstSize) in verifyPreISelGenericInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3757 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst() local
3787 if (OffsetOp.isImm()) { in expandMem16Inst()
3788 int64_t LoOffset = OffsetOp.getImm() & 0xffff; in expandMem16Inst()
3789 int64_t HiOffset = OffsetOp.getImm() & ~0xffff; in expandMem16Inst()
3799 bool Is32BitImm = isInt<32>(OffsetOp.getImm()); in expandMem16Inst()
3812 if (OffsetOp.isExpr()) { in expandMem16Inst()
3821 if (!OffsetOp.getExpr()->evaluateAsRelocatable(Res, nullptr, nullptr)) { in expandMem16Inst()
3839 const MCExpr *OffExpr = OffsetOp.getExpr(); in expandMem16Inst()
3884 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst() local
3915 if (OffsetOp.isImm()) { in expandMem9Inst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2364 const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1); in emitEpilogue() local
2368 if (OffsetOp.getImm() == 0 && AfterCSRPopSize >= 0) { in emitEpilogue()
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| H A D | AArch64ISelDAGToDAG.cpp | 1647 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); in tryIndexedLoad() local
1648 int OffsetVal = (int)OffsetOp->getZExtValue(); in tryIndexedLoad()
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| H A D | AArch64ISelLowering.cpp | 23059 SDValue OffsetOp = Add.getOperand(1); in foldIndexIntoBase() local
23061 if (auto Offset = DAG.getSplatValue(OffsetOp)) { in foldIndexIntoBase()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 8866 SDValue OffsetOp) { in InferPointerInfo() argument
8868 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) in InferPointerInfo()
8870 if (OffsetOp.isUndef()) in InferPointerInfo()
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| H A D | DAGCombiner.cpp | 8760 auto OffsetOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); in calculateByteProvider() local
8761 if (!OffsetOp) in calculateByteProvider()
8764 VectorIndex = OffsetOp->getZExtValue(); in calculateByteProvider()
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