| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 205 int64_t Offset1 = 0; in getHazardType() local
211 Ptr1 = GetPointerBaseWithConstantOffset(BaseVal1, Offset1, DL, true); in getHazardType()
213 return CheckOffsets(Offset0, Offset1); in getHazardType()
223 Offset1 = MF.getFrameInfo().getObjectOffset(FS1->getFrameIndex()); in getHazardType()
224 return CheckOffsets(Offset0, Offset1); in getHazardType()
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| H A D | ARMBaseInstrInfo.h | 252 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
264 int64_t Offset1, int64_t Offset2,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.h | 129 bool isDSOffset2Legal(SDValue Base, unsigned Offset0, unsigned Offset1,
140 SDValue &Offset1) const;
142 SDValue &Offset1) const;
144 SDValue &Offset1, unsigned Size) const;
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| H A D | AMDGPUISelDAGToDAG.cpp | 1154 unsigned Offset1, in isDSOffset2Legal() argument
1156 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal()
1158 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal()
1248 SDValue &Offset1) const { in SelectDS64Bit4ByteAligned()
1249 return SelectDSReadWrite2(Addr, Base, Offset0, Offset1, 4); in SelectDS64Bit4ByteAligned()
1254 SDValue &Offset1) const { in SelectDS128Bit8ByteAligned()
1255 return SelectDSReadWrite2(Addr, Base, Offset0, Offset1, 8); in SelectDS128Bit8ByteAligned()
1259 SDValue &Offset0, SDValue &Offset1, in SelectDSReadWrite2() argument
1274 Offset1 = CurDAG->getTargetConstant(OffsetValue1 / Size, DL, MVT::i8); in SelectDSReadWrite2()
1310 Offset1 = CurDAG->getTargetConstant(OffsetValue1 / Size, DL, MVT::i8); in SelectDSReadWrite2()
[all …]
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| H A D | SIInstrInfo.h | 238 int64_t &Offset1) const override;
247 int64_t Offset1, bool OffsetIsScalable1,
254 int64_t Offset1, unsigned NumLoads) const override;
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| H A D | AMDGPUInstructionSelector.h | 258 bool isDSOffset2Legal(Register Base, int64_t Offset0, int64_t Offset1,
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| H A D | SIInstrInfo.cpp | 232 int64_t &Offset1) const { in areLoadsFromSameBasePtr()
272 Offset1 = Load1->getConstantOperandVal(Offset1Idx); in areLoadsFromSameBasePtr()
304 Offset1 = Load1Offset->getZExtValue(); in areLoadsFromSameBasePtr()
337 Offset1 = Off1->getAsZExtVal(); in areLoadsFromSameBasePtr()
395 unsigned Offset1 = Offset1Op->getImm() & 0xff; in getMemOperandsWithOffsetWidth() local
396 if (Offset0 + 1 != Offset1) in getMemOperandsWithOffsetWidth()
550 int64_t Offset1, bool OffsetIsScalable1, in shouldClusterMemOps() argument
595 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear() argument
597 assert(Offset1 > Offset0 && in shouldScheduleLoadsNear()
603 return (NumLoads <= 16 && (Offset1 - Offset0) < 64); in shouldScheduleLoadsNear()
[all …]
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| H A D | AMDGPUInstructionSelector.cpp | 1588 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (Instruction << 4); in selectDSOrderedIntrinsic() local
1591 Offset1 |= (CountDw - 1) << 6; in selectDSOrderedIntrinsic()
1594 Offset1 |= ShaderType << 2; in selectDSOrderedIntrinsic()
1596 unsigned Offset = Offset0 | (Offset1 << 8); in selectDSOrderedIntrinsic()
4701 int64_t Offset1, in isDSOffset2Legal() argument
4703 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal()
4705 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal()
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| H A D | DSInstructions.td | 159 Offset0:$offset0, Offset1:$offset1, gds:$gds),
246 (ins VGPR_32:$addr, src_op:$data0, src_op:$data1, Offset0:$offset0, Offset1:$offset1, gds:$gds),
305 (ins VGPR_32:$addr, Offset0:$offset0, Offset1:$offset1, gds:$gds),
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 676 APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0); in foldLoadsRecursive() local
678 Load1Ptr->stripAndAccumulateConstantOffsets(DL, Offset1, in foldLoadsRecursive()
721 if (Offset2.slt(Offset1)) { in foldLoadsRecursive()
724 std::swap(Offset1, Offset2); in foldLoadsRecursive()
755 if ((Shift2 - Shift1) != ShiftDiff || (Offset2 - Offset1) != PrevSize) in foldLoadsRecursive()
811 APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0); in foldConsecutiveLoads() local
813 DL, Offset1, /* AllowNonInbounds */ true); in foldConsecutiveLoads()
814 Load1Ptr = Builder.CreatePtrAdd(Load1Ptr, Builder.getInt(Offset1)); in foldConsecutiveLoads()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 247 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
248 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || in ClusterNeighboringLoads()
249 Offset1 == Offset2 || in ClusterNeighboringLoads()
255 if (O2SMap.insert(std::make_pair(Offset1, Base)).second) in ClusterNeighboringLoads()
256 Offsets.push_back(Offset1); in ClusterNeighboringLoads()
259 if (Offset2 < Offset1) in ClusterNeighboringLoads()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 400 int64_t Offset1, Offset2; in ConsecutiveInstr() local
401 if (!GetImm(MI1, 2, Offset1)) in ConsecutiveInstr()
409 return ((Offset1 == (Offset2 - 4)) && (ConsecutiveRegisters(Reg1, Reg2))); in ConsecutiveInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 407 int64_t Offset1; in apply() local
409 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply()
415 if (((Offset0 ^ Offset1) & 0x18) != 0) in apply()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Value.cpp | 1032 APInt Offset1(DL.getIndexTypeSizeInBits(Ptr1->getType()), 0); in getPointerOffsetFrom() local
1034 Ptr1 = Ptr1->stripAndAccumulateConstantOffsets(DL, Offset1, true); in getPointerOffsetFrom()
1039 return Offset2.getSExtValue() - Offset1.getSExtValue(); in getPointerOffsetFrom()
1064 Offset1.getSExtValue(); in getPointerOffsetFrom()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 476 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
494 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1445 int64_t &Offset1, in areLoadsFromSameBasePtr() argument
1459 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
1562 int64_t Offset1, bool OffsetIsScalable1, in shouldClusterMemOps() argument
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| /freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ContainerModeling.cpp | 130 SymbolRef Offset1,
968 SymbolRef Offset1, in invalidateIteratorPositions() argument
973 return compare(State, Pos.getOffset(), Offset1, Opc1) && in invalidateIteratorPositions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 175 int64_t Offset1, bool OffsetIsScalable1,
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SeparateConstOffsetFromGEP.cpp | 1368 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local
1371 Second->setOperand(1, Offset1); in swapGEPOperand()
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| H A D | ConstraintElimination.cpp | 666 int64_t Offset1 = ADec.Offset; in getConstraint() local
668 Offset1 *= -1; in getConstraint()
718 if (AddOverflow(Offset1, Offset2, OffsetSum)) in getConstraint()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 325 int64_t Offset1, bool OffsetIsScalable1,
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| H A D | AArch64InstrInfo.cpp | 4283 int64_t Offset1, unsigned Opcode1, int FI2, in shouldClusterFI() argument
4300 ObjectOffset1 += Offset1; in shouldClusterFI()
4351 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps() local
4352 if (hasUnscaledLdStOffset(FirstOpc) && !scaleOffset(FirstOpc, Offset1)) in shouldClusterMemOps()
4360 if (Offset1 > 63 || Offset1 < -64) in shouldClusterMemOps()
4366 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps()
4371 return shouldClusterFI(MFI, BaseOp1.getIndex(), Offset1, FirstOpc, in shouldClusterMemOps()
4375 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps()
4377 return Offset1 + 1 == Offset2; in shouldClusterMemOps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 576 int64_t Offset1, bool OffsetIsScalable1,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 873 int64_t Offset1, Offset2; in addLoopCarriedDependences() local
875 if (TII->getMemOperandWithOffset(LdMI, BaseOp1, Offset1, in addLoopCarriedDependences()
881 (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 1252 APInt Offset1(IndexWidth, 0); in ConstantFoldCompareInstOperands() local
1254 Ops1->stripAndAccumulateInBoundsConstantOffsets(DL, Offset1); in ConstantFoldCompareInstOperands()
1258 ICmpInst::compare(Offset0, Offset1, in ConstantFoldCompareInstOperands()
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