Searched refs:Off0 (Results 1 – 3 of 3) sorted by relevance
37 int64_t &Off0, int64_t &Off1) { in mayOverlapWrite() argument47 Off0 = AArch64InstrInfo::hasUnscaledLdStOffset(MI0.getOpcode()) in mayOverlapWrite()54 const MachineInstr &MI = (Off0 < Off1) ? MI0 : MI1; in mayOverlapWrite()58 return llabs(Off0 - Off1) < StoreSize; in mayOverlapWrite()72 int64_t Off0, Off1; in tryCandidate() local74 if (!mayOverlapWrite(*Instr0, *Instr1, Off0, Off1)) { in tryCandidate()77 return Off0 < Off1; in tryCandidate()
329 SDValue Off0 = Load0->getOperand(OffIdx0); in areLoadsFromSameBasePtr() local333 if (!isa<ConstantSDNode>(Off0) || !isa<ConstantSDNode>(Off1)) in areLoadsFromSameBasePtr()336 Offset0 = Off0->getAsZExtVal(); in areLoadsFromSameBasePtr()
7649 unsigned Off0 = rev ? NumElts / 2 : 0; in isVMOVNTruncMask() local7652 if (M[i] >= 0 && M[i] != (int)(Off0 + i / 2)) in isVMOVNTruncMask()16672 unsigned Off0 = Rev ? NumElts : 0; in PerformSplittingToNarrowingStores() local16676 if (M[I] >= 0 && M[I] != (int)(Off0 + I / 2)) in PerformSplittingToNarrowingStores()