Searched refs:OP_SEL_0 (Results 1 – 13 of 13) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNDPPCombine.cpp | 374 OpSel |= (Mod0 ? (!!(Mod0->getImm() & SISrcMods::OP_SEL_0) << 0) : 0); in createDPPInst() 375 OpSel |= (Mod1 ? (!!(Mod1->getImm() & SISrcMods::OP_SEL_0) << 1) : 0); in createDPPInst() 376 OpSel |= (Mod2 ? (!!(Mod2->getImm() & SISrcMods::OP_SEL_0) << 2) : 0); in createDPPInst()
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H A D | SIFoldOperands.cpp | 268 Fold.ImmToFold >> (ModVal & SISrcMods::OP_SEL_0 ? 16 : 0)); in tryFoldImmWithOpSel() 272 unsigned NewModVal = ModVal & ~(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1); in tryFoldImmWithOpSel() 307 Mod.setImm(NewModVal | SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1); in tryFoldImmWithOpSel() 315 Mod.setImm(NewModVal | SISrcMods::OP_SEL_0); in tryFoldImmWithOpSel()
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H A D | SIDefines.h | 292 OP_SEL_0 = 1 << 2, enumerator
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H A D | AMDGPUISelDAGToDAG.cpp | 2933 Mods |= SISrcMods::OP_SEL_0; in SelectVINTERPModsImpl() 3011 Mods |= SISrcMods::OP_SEL_0; in SelectVOP3PMods() 3110 Mods |= SISrcMods::OP_SEL_0; in SelectWMMAOpSelVOP3PMods() 3499 Mods |= SISrcMods::OP_SEL_0; in SelectVOP3PMadMixModsImpl()
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H A D | AMDGPUInstructionSelector.cpp | 3686 Mods |= SISrcMods::OP_SEL_0; in selectVOP3ModsImpl() 3896 Mods |= SISrcMods::OP_SEL_0; in selectWMMAOpSelVOP3PMods() 5440 Mods |= SISrcMods::OP_SEL_0; in selectVOP3PMadMixModsImpl() 5663 MIB.addImm(MI.getOperand(OpIdx).getImm() ? (int64_t)SISrcMods::OP_SEL_0 : 0); in renderOpSelTImm()
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H A D | VOP3Instructions.td | 692 !if(index{0}, SRCMODS.OP_SEL_0, 0), $old, 0) 838 N->getZExtValue() ? SISrcMods::OP_SEL_0 : SISrcMods::NONE,
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H A D | VOP1Instructions.td | 690 (inst_e64 SRCMODS.OP_SEL_0, $src, 0, 0, SRCMODS.NONE),
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H A D | SIInstrInfo.cpp | 1038 .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1) in copyPhysReg() 1126 .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1) in copyPhysReg() 2228 .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1) // src1_mod in expandPostRAPseudo()
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H A D | SIInstrInfo.td | 1438 int OP_SEL_0 = 4;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUInstPrinter.cpp | 1362 Mod == SISrcMods::OP_SEL_0 && in printPackedModifier() 1394 unsigned Index0 = !!(Mod & SISrcMods::OP_SEL_0); in printOpSel() 1403 unsigned FI = !!(MI->getOperand(FIN).getImm() & SISrcMods::OP_SEL_0); in printOpSel() 1404 unsigned BC = !!(MI->getOperand(BCN).getImm() & SISrcMods::OP_SEL_0); in printOpSel() 1410 printPackedModifier(MI, " op_sel:[", SISrcMods::OP_SEL_0, O); in printOpSel()
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H A D | AMDGPUMCCodeEmitter.cpp | 643 Op |= SISrcMods::OP_SEL_0; in getMachineOpValueT16()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.cpp | 818 Modifiers.OpSel |= !!(Val & SISrcMods::OP_SEL_0) << J; in collectVOPModifiers() 839 SISrcMods::OP_SEL_0}, in convertTrue16OpSel() 841 SISrcMods::OP_SEL_0}, in convertTrue16OpSel() 843 SISrcMods::OP_SEL_0}, in convertTrue16OpSel()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 8627 ModVal |= SISrcMods::OP_SEL_0; in cvtVINTERP() 8788 ModVal |= SISrcMods::OP_SEL_0; in cvtVOP3P() 8791 ModVal |= SISrcMods::OP_SEL_0; in cvtVOP3P()
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