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Searched refs:OPERAND_REG_INLINE_C_INT32 (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td1152 def SCSrc_b32 : SrcRegOrImm9 <SReg_32, "OPERAND_REG_INLINE_C_INT32">;
1268 def VCSrc_b32 : SrcRegOrImm9 <VS_32, "OPERAND_REG_INLINE_C_INT32">;
1286 def VISrc_64_b32 : SrcRegOrImm9 <VReg_64, "OPERAND_REG_INLINE_C_INT32">;
1290 def VISrc_128_b32 : SrcRegOrImm9 <VReg_128, "OPERAND_REG_INLINE_C_INT32">;
1292 def VISrc_256_b32 : SrcRegOrImm9 <VReg_256, "OPERAND_REG_INLINE_C_INT32">;
1295 def VISrc_512_b32 : SrcRegOrImm9 <VReg_512, "OPERAND_REG_INLINE_C_INT32">;
1298 def VISrc_1024_b32 : SrcRegOrImm9 <VReg_1024, "OPERAND_REG_INLINE_C_INT32">;
H A DSIDefines.h216 OPERAND_REG_INLINE_C_INT32, enumerator
H A DSIFoldOperands.cpp1247 *UseImmVal, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
1850 TII->isInlineConstant(*Lookup, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldCopyToAGPRRegSequence()
H A DSIInstrInfo.cpp4399 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in isInlineConstant()
4865 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in verifyInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp291 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in getLitEncoding()
H A DAMDGPUInstPrinter.cpp733 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in printRegularOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h1590 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in getOperandSize()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp2006 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in getOpFltSemantics()
2385 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in addLiteralImmOperand()
2431 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in addLiteralImmOperand()