Searched refs:OPERAND_REG_IMM_FP16 (Results 1 – 9 of 9) sorted by relevance
1141 def SSrc_f16 : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_FP16">;1162 def VSrc_f16 : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_FP16">;1167 def VSrcT_f16 : SrcRegOrImm9_t16 <"OPERAND_REG_IMM_FP16">;1173 def VSrcT_f16_Lo128 : SrcRegOrImm9_t16 <"OPERAND_REG_IMM_FP16", VS_16_Lo128>;1180 def VSrcFake16_f16_Lo128 : SrcRegOrImm9 <VS_32_Lo128, "OPERAND_REG_IMM_FP16">;
207 OPERAND_REG_IMM_FP16, enumerator
4437 case AMDGPU::OPERAND_REG_IMM_FP16: in isInlineConstant()
317 case AMDGPU::OPERAND_REG_IMM_FP16: in getLitEncoding()
757 case AMDGPU::OPERAND_REG_IMM_FP16: in printRegularOperand()
1611 case AMDGPU::OPERAND_REG_IMM_FP16: in getOperandSize()
2624 case AMDGPU::OPERAND_REG_IMM_FP16: in isSISrcFPOperand()
2024 case AMDGPU::OPERAND_REG_IMM_FP16: in getOpFltSemantics()2390 case AMDGPU::OPERAND_REG_IMM_FP16: in addLiteralImmOperand()2514 case AMDGPU::OPERAND_REG_IMM_FP16: in addLiteralImmOperand()3745 if (OperandType == AMDGPU::OPERAND_REG_IMM_FP16 || in isInlineConstant()
561 case AMDGPU::OPERAND_REG_IMM_FP16: in decodeImmOperands()