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Searched refs:OPERAND_REG_IMM_BF16 (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td1135 def SSrc_bf16: SrcRegOrImm9 <SReg_32, "OPW32", "OPERAND_REG_IMM_BF16", 16, OperandSemantics.BF16>;
1170 def VSrc_bf16 : SrcRegOrImm9 <VS_32, "OPW32", "OPERAND_REG_IMM_BF16", 16, OperandSemantics.BF16>;
1178 def VSrcT_bf16 : RegOrImmOperand <VS_16, "OPERAND_REG_IMM_BF16"> {
1192 def VSrcT_bf16_Lo128 : RegOrImmOperand <VS_16_Lo128, "OPERAND_REG_IMM_BF16"> {
1204 def VSrcFake16_bf16_Lo128 : SrcRegOrImm9 <VS_32_Lo128, "OPW16", "OPERAND_REG_IMM_BF16", 16, Operand…
H A DSIDefines.h205 OPERAND_REG_IMM_BF16, enumerator
H A DSIInstrInfo.cpp4306 case AMDGPU::OPERAND_REG_IMM_BF16: in isInlineConstant()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp308 case AMDGPU::OPERAND_REG_IMM_BF16: in getLitEncoding()
H A DAMDGPUInstPrinter.cpp858 case AMDGPU::OPERAND_REG_IMM_BF16: in printRegularOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h1381 case AMDGPU::OPERAND_REG_IMM_BF16: in getOperandSize()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp1956 case AMDGPU::OPERAND_REG_IMM_BF16: in getOpFltSemantics()
2274 case AMDGPU::OPERAND_REG_IMM_BF16: in addLiteralImmOperand()
2421 case AMDGPU::OPERAND_REG_IMM_BF16: in addLiteralImmOperand()
3608 if (OperandType == AMDGPU::OPERAND_REG_IMM_BF16 || in isInlineConstant()