Home
last modified time | relevance | path

Searched refs:NumVTs (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp4104 unsigned NumVTs; in SelectCodeCommon() local
4108 NumVTs = Opcode - OPC_MorphNodeTo0; in SelectCodeCommon()
4110 NumVTs = Opcode - OPC_MorphNodeTo0None; in SelectCodeCommon()
4113 NumVTs = Opcode - OPC_MorphNodeTo0Chain; in SelectCodeCommon()
4116 NumVTs = Opcode - OPC_MorphNodeTo0GlueInput; in SelectCodeCommon()
4119 NumVTs = Opcode - OPC_MorphNodeTo0GlueOutput; in SelectCodeCommon()
4121 NumVTs = Opcode - OPC_EmitNode0; in SelectCodeCommon()
4123 NumVTs = Opcode - OPC_EmitNode0None; in SelectCodeCommon()
4125 NumVTs = Opcode - OPC_EmitNode0Chain; in SelectCodeCommon()
4127 NumVTs = MatcherTable[MatcherIndex++]; in SelectCodeCommon()
[all …]
H A DSelectionDAG.cpp89 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { in makeVTList() argument
90 SDVTList Res = {VTs, NumVTs}; in makeVTList()
9330 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { in getMemIntrinsicNode()
10710 if (VTList.NumVTs == 1) in getNode()
10724 assert(VTList.NumVTs == 2 && Ops.size() == 2 && in getNode()
10766 assert(VTList.NumVTs == 2 && Ops.size() == 3 && in getNode()
10776 assert(VTList.NumVTs == 2 && Ops.size() == 2 && "Invalid mul lo/hi op!"); in getNode()
10806 assert(VTList.NumVTs == 2 && Ops.size() == 1 && "Invalid ffrexp op!"); in getNode()
10823 assert(VTList.NumVTs == 2 && Ops.size() == 2 && in getNode()
10838 assert(VTList.NumVTs == 2 && Ops.size() == 3 && "Invalid STRICT_FP_ROUND!"); in getNode()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h82 unsigned int NumVTs; member
1204 : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
1208 assert(NumValues == VTs.NumVTs &&
H A DSelectionDAG.h110 unsigned int NumVTs;
117 FastID(ID), VTs(VT), NumVTs(Num) {
122 SDVTList result = {VTs, NumVTs};
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3288 assert(VTs.NumVTs == 2); in LowerUAddSubO()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp10007 assert(VTList.NumVTs == 2 || VTList.NumVTs == 3); in getMemIntrinsicNode()
10008 bool IsTFE = VTList.NumVTs == 3; in getMemIntrinsicNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp7471 for (unsigned i = 0, ie = VTs.NumVTs; i != ie; ++i) in PeepholePPC64ZExt()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp60424 if (VTs.NumVTs > 0 && VTs.VTs[0] == MVT::v1i64) { in FixupMMXIntrinsicTypes()
60425 SmallVector<EVT> NewVTArr(ArrayRef<EVT>(VTs.VTs, VTs.NumVTs)); in FixupMMXIntrinsicTypes()