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Searched refs:NumOps (Results 1 – 25 of 107) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/
H A DSPIRVInstPrinter.cpp37 const unsigned NumOps = MI->getNumOperands(); in printRemainingVariableOps() local
38 for (unsigned i = StartIndex; i < NumOps; ++i) { in printRemainingVariableOps()
195 const unsigned NumOps = MI->getNumOperands(); in printInst() local
196 for (unsigned i = NumFixedOps; i < NumOps; ++i) { in printInst()
201 assert(i + 1 < NumOps && "Missing alignment operand"); in printInst()
216 const unsigned NumOps = MI->getNumOperands(); in printInst() local
217 if (NumFixedOps == NumOps) in printInst()
244 const unsigned NumOps = MI->getNumOperands(); in printInst() local
245 if (NumFixedOps >= NumOps) in printInst()
248 const unsigned Flags = MI->getOperand(NumOps - 1).getImm(); in printInst()
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H A DSPIRVMCCodeEmitter.cpp93 unsigned NumOps = MI.getNumOperands(); in emitTypedInstrOperands() local
96 for (unsigned i = 2; i < NumOps; ++i) in emitTypedInstrOperands()
H A DSPIRVBaseInfo.h278 const unsigned NumOps = MI.getNumOperands(); in getSPIRVStringOperand() local
280 for (unsigned i = StartIndex; i < NumOps && !IsFinished; ++i) { in getSPIRVStringOperand()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DUser.h62 const unsigned NumOps; member
68 const unsigned NumOps; member
81 const unsigned NumOps : NumUserOperandsBits;
90 : NumOps(0), HasHungOffUses(true), HasDescriptor(false) {} in AllocInfo()
93 : NumOps(Alloc.NumOps), HasHungOffUses(false), HasDescriptor(false) {} in AllocInfo()
96 : NumOps(Alloc.NumOps), HasHungOffUses(false), in AllocInfo()
120 assert(AllocInfo.NumOps < (1u << NumUserOperandsBits) && in User()
122 NumUserOperands = AllocInfo.NumOps; in User()
265 void setNumHungOffUseOperands(unsigned NumOps) { in setNumHungOffUseOperands() argument
267 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in setNumHungOffUseOperands()
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H A DMetadata.h1099 static constexpr size_t getOpSize(unsigned NumOps) {
1100 return sizeof(MDOperand) * NumOps;
1104 static size_t getSmallSize(size_t NumOps, bool IsResizable, bool IsLarge) {
1106 : std::max(NumOps, NumOpsFitInVector * IsResizable);
1109 static size_t getAllocSize(StorageType Storage, size_t NumOps) {
1111 getSmallSize(NumOps, isResizable(Storage), isLarge(NumOps))) +
1117 static bool isLarge(size_t NumOps) { return NumOps > MaxSmallSize; }
1146 LLVM_ABI void resizeSmall(size_t NumOps);
1147 LLVM_ABI void resizeSmallToLarge(size_t NumOps);
1148 LLVM_ABI void resize(size_t NumOps);
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H A DGlobalVariable.h84 void setGlobalVariableNumOperands(unsigned NumOps) { in setGlobalVariableNumOperands() argument
85 assert(NumOps <= 1 && "GlobalVariable can only have 0 or 1 operands"); in setGlobalVariableNumOperands()
86 NumUserOperands = NumOps; in setGlobalVariableNumOperands()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.h131 template <unsigned NumOps>
133 int8_t RegBanks[NumOps];
137 template <unsigned NumOps>
140 const std::array<unsigned, NumOps> RegSrcOpIdx,
141 ArrayRef<OpRegBankEntry<NumOps>> Table) const;
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp53 void addOperandMapping(unsigned MIOpNo, unsigned NumOps, const Record *Rec,
70 unsigned MIOpNo, unsigned NumOps, const Record *Rec, const DagInit *Dag, in addOperandMapping() argument
100 if (NumOps != SrcOpnd.MINumOperands) in addOperandMapping()
110 for (unsigned I = 0, E = NumOps; I != E; ++I) { in addOperandMapping()
119 assert(NumOps == 1); in addOperandMapping()
124 assert(NumOps == 1); in addOperandMapping()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineRegisterInfo.cpp239 unsigned NumOps = MI->getNumOperands(); in verifyUseList() local
240 if (!(MO >= MO0 && MO < MO0+NumOps)) { in verifyUseList()
343 unsigned NumOps) { in moveOperands() argument
344 assert(Src != Dst && NumOps && "Noop moveOperands"); in moveOperands()
348 if (Dst >= Src && Dst < Src + NumOps) { in moveOperands()
350 Dst += NumOps - 1; in moveOperands()
351 Src += NumOps - 1; in moveOperands()
380 } while (--NumOps); in moveOperands()
H A DCallingConvLower.cpp128 unsigned NumOps = Outs.size(); in AnalyzeCallOperands() local
129 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
146 unsigned NumOps = ArgVTs.size(); in AnalyzeCallOperands() local
147 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DMetadata.cpp634 void *MDNode::operator new(size_t Size, size_t NumOps, StorageType Storage) { in operator new() argument
638 alignTo(Header::getAllocSize(Storage, NumOps), alignof(uint64_t)); in operator new()
640 Header *H = new (Mem + AllocSize - sizeof(Header)) Header(NumOps, Storage); in operator new()
679 MDNode::Header::Header(size_t NumOps, StorageType Storage) { in Header() argument
680 IsLarge = isLarge(NumOps); in Header()
682 SmallSize = getSmallSize(NumOps, IsResizable, IsLarge); in Header()
686 getLarge().resize(NumOps); in Header()
689 SmallNumOps = NumOps; in Header()
712 void MDNode::Header::resize(size_t NumOps) { in resize() argument
714 if (operands().size() == NumOps) in resize()
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H A DUser.cpp164 return allocateFixedOperandUser(Size, allocTrait.NumOps, 0); in operator new()
169 return allocateFixedOperandUser(Size, allocTrait.NumOps, in operator new()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCTargetDesc.cpp236 unsigned NumOps = Inst.getNumOperands(); in evaluateBranch() local
237 if (NumOps == 0) in evaluateBranch()
239 switch (Info->get(Inst.getOpcode()).operands()[NumOps - 1].OperandType) { in evaluateBranch()
245 Target = Region + Inst.getOperand(NumOps - 1).getImm(); in evaluateBranch()
250 Target = Addr + Inst.getOperand(NumOps - 1).getImm(); in evaluateBranch()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenInstruction.cpp85 unsigned NumOps = 1; in CGIOperandList() local
110 NumOps = NumArgs; in CGIOperandList()
143 MIOperandNo, NumOps, MIOpInfo); in CGIOperandList()
146 if (SubArgDag->getNumArgs() != NumOps) { in CGIOperandList()
151 Twine(NumOps) + "."); in CGIOperandList()
154 for (unsigned j = 0; j < NumOps; ++j) { in CGIOperandList()
190 MIOperandNo += NumOps; in CGIOperandList()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp171 unsigned NumOps = N->getNumOperands(); in tryInlineAsm() local
182 SDValue Glue = N->getGluedNode() ? N->getOperand(NumOps - 1) : SDValue(); in tryInlineAsm()
186 for(unsigned i = 0, e = N->getGluedNode() ? NumOps - 1 : NumOps; i < e; ++i) { in tryInlineAsm()
229 assert((i+2 < NumOps) && "Invalid number of operands in inline asm"); in tryInlineAsm()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp815 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
816 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceTo2Addr()
817 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceTo2Addr()
837 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
839 if (i < NumOps && MCID.operands()[i].isOptionalDef()) in ReduceTo2Addr()
906 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
907 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceToNarrow()
908 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceToNarrow()
943 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
945 if (i < NumOps && MCID.operands()[i].isOptionalDef()) in ReduceToNarrow()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp483 unsigned NumOps = Node->getNumOperands(); in DelayForLiveRegsBottomUp() local
484 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) in DelayForLiveRegsBottomUp()
485 --NumOps; // Ignore the glue operand. in DelayForLiveRegsBottomUp()
487 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { in DelayForLiveRegsBottomUp()
676 unsigned NumOps = N->getNumOperands(); in ScheduleNode() local
677 if (unsigned NumLeft = NumOps) { in ScheduleNode()
683 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) { in ScheduleNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp129 unsigned NumOps = N->getNumOperands(); in selectInlineAsm() local
138 N->getGluedNode() ? N->getOperand(NumOps - 1) : SDValue(nullptr, 0); in selectInlineAsm()
142 for (unsigned i = 0, e = N->getGluedNode() ? NumOps - 1 : NumOps; i < e; in selectInlineAsm()
197 assert((i + 2 < NumOps) && "Invalid number of operands in inline asm"); in selectInlineAsm()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp442 unsigned NumOps = 0; in foldIntoMemoryOps() local
444 I < UseMI.getNumOperands(); I += 1 + NumOps) { in foldIntoMemoryOps()
451 NumOps = Flags.getNumOperandRegisters(); in foldIntoMemoryOps()
454 if (NumOps != 2 || !Flags.isMemKind()) { in foldIntoMemoryOps()
457 for (unsigned J = 0; J < NumOps; ++J) { in foldIntoMemoryOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.cpp459 unsigned NumOps = Inst.getNumOperands(); in evaluateBranch() local
460 if (NumOps == 0 || in evaluateBranch()
461 Info->get(Inst.getOpcode()).operands()[NumOps - 1].OperandType != in evaluateBranch()
464 Target = Addr + Inst.getOperand(NumOps - 1).getImm() * Size; in evaluateBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp976 unsigned NumOps = MI.getNumOperands(); in emitVEXOpcodePrefix() local
977 for (unsigned I = NumOps ? X86II::getOperandBias(Desc) : 0; I != NumOps; in emitVEXOpcodePrefix()
1235 unsigned NumOps = Desc.getNumOperands(); in emitVEXOpcodePrefix() local
1236 unsigned RcOperand = NumOps - 1; in emitVEXOpcodePrefix()
1353 unsigned NumOps = MI.getNumOperands(); in emitREXPrefix() local
1358 unsigned CurOp = NumOps ? X86II::getOperandBias(Desc) : 0; in emitREXPrefix()
1359 for (unsigned i = CurOp; i != NumOps; ++i) { in emitREXPrefix()
1567 unsigned NumOps = Desc.getNumOperands(); in encodeInstruction() local
1610 OpcodeOffset = MI.getOperand(NumOps - 1).getImm(); in encodeInstruction()
1612 --NumOps; // Drop the operand from the end. in encodeInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DAMDGPUEmitPrintf.cpp428 auto NumOps = Args.size(); in emitAMDGPUPrintfCall() local
429 assert(NumOps >= 1); in emitAMDGPUPrintfCall()
522 Desc = appendString(Builder, Desc, Fmt, NumOps == 1); in emitAMDGPUPrintfCall()
527 for (unsigned int i = 1; i != NumOps; ++i) { in emitAMDGPUPrintfCall()
528 bool IsLast = i == NumOps - 1; in emitAMDGPUPrintfCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenPredicate.cpp349 unsigned NumOps = MI->getNumOperands(); in convertToPredForm() local
350 for (unsigned i = 0; i < NumOps; ++i) { in convertToPredForm()
386 NumOps = 2; in convertToPredForm()
402 for (unsigned i = 1; i < NumOps; ++i) { in convertToPredForm()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchMCTargetDesc.cpp104 unsigned NumOps = Inst.getNumOperands(); in evaluateBranch() local
107 Target = Addr + Inst.getOperand(NumOps - 1).getImm(); in evaluateBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1197 unsigned NumOps = MI.getDesc().getNumOperands(); in handleOneArgFP() local
1198 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
1202 unsigned Reg = getFPReg(MI.getOperand(NumOps - 1)); in handleOneArgFP()
1230 MI.removeOperand(NumOps - 1); // Remove explicit ST(0) operand in handleOneArgFP()
1260 unsigned NumOps = MI.getDesc().getNumOperands(); in handleOneArgFPRW() local
1261 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!"); in handleOneArgFPRW()
1611 unsigned NumOps = 0; in handleSpecialFP() local
1616 i != e && MI.getOperand(i).isImm(); i += 1 + NumOps) { in handleSpecialFP()
1620 NumOps = F.getNumOperandRegisters(); in handleSpecialFP()
1621 if (NumOps != 1) in handleSpecialFP()

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