Searched refs:NotOpc (Results 1 – 3 of 3) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.cpp | 110 unsigned NotOpc; member 132 NotOpc = AMDGPU::S_NOT_B32; in SGPRSpillBuilder() 136 NotOpc = AMDGPU::S_NOT_B64; in SGPRSpillBuilder() 229 auto I = BuildMI(*MBB, MI, DL, TII.get(NotOpc), ExecReg).addReg(ExecReg); in prepare() 264 auto I = BuildMI(*MBB, MI, DL, TII.get(NotOpc), ExecReg).addReg(ExecReg); in restore() 303 auto Not0 = BuildMI(*MBB, MI, DL, TII.get(NotOpc), ExecReg).addReg(ExecReg); in readWriteTmpVGPR() 306 auto Not1 = BuildMI(*MBB, MI, DL, TII.get(NotOpc), ExecReg).addReg(ExecReg); in readWriteTmpVGPR()
|
H A D | SIInstrInfo.cpp | 2276 unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64; in expandPostRAPseudo() local 2282 auto FirstNot = BuildMI(MBB, MI, DL, get(NotOpc), Exec).addReg(Exec); in expandPostRAPseudo() 2286 BuildMI(MBB, MI, DL, get(NotOpc), Exec) in expandPostRAPseudo() 2292 unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64; in expandPostRAPseudo() local 2298 auto FirstNot = BuildMI(MBB, MI, DL, get(NotOpc), Exec).addReg(Exec); in expandPostRAPseudo() 2304 BuildMI(MBB, MI, DL, get(NotOpc), Exec) in expandPostRAPseudo()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 3804 unsigned NotOpc; in tryShiftAmountMod() local 3808 NotOpc = AArch64::ORNWrr; in tryShiftAmountMod() 3812 NotOpc = AArch64::ORNXrr; in tryShiftAmountMod() 3818 CurDAG->getMachineNode(NotOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|