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Searched refs:NextMI (Results 1 – 18 of 18) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenMemAbsolute.cpp111 MachineInstr *NextMI = NextUseMI->getParent(); in runOnMachineFunction() local
112 int NextOpc = NextMI->getOpcode(); in runOnMachineFunction()
123 if (!TII->getBaseAndOffsetPosition(*NextMI, BaseRegPos, ImmPos)) in runOnMachineFunction()
134 TII->getMemOperandWithOffset(*NextMI, BaseOp, Offset, Scalable, TRI); in runOnMachineFunction()
147 const MachineOperand &MO0 = NextMI->getOperand(RegPos); in runOnMachineFunction()
166 if (!MDT.dominates(NextMI, I->getParent())) in runOnMachineFunction()
179 dbgs() << *NextMI; in runOnMachineFunction()
181 MachineBasicBlock *ParentBlock = NextMI->getParent(); in runOnMachineFunction()
185 MIB = BuildMI(*ParentBlock, NextMI, NextMI->getDebugLoc(), in runOnMachineFunction()
190 MIB = BuildMI(*ParentBlock, NextMI, NextMI->getDebugLoc(), in runOnMachineFunction()
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H A DHexagonVLIWPacketizer.cpp1365 MachineInstr &NextMI = *NextMII; in isLegalToPacketizeTogether() local
1368 const MachineOperand &NOp0 = NextMI.getOperand(0); in isLegalToPacketizeTogether()
1369 const MachineOperand &NOp1 = NextMI.getOperand(1); in isLegalToPacketizeTogether()
1812 MachineBasicBlock::instr_iterator NextMI = std::next(MI->getIterator()); in endPacket() local
1813 for (auto &I : make_range(HII->expandVGatherPseudo(*MI), NextMI)) in endPacket()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPostRABundler.cpp56 bool canBundle(const MachineInstr &MI, const MachineInstr &NextMI) const;
115 const MachineInstr &NextMI) const { in canBundle()
118 return (IMemFlags != 0 && MI.mayLoadOrStore() && !NextMI.isBundled() && in canBundle()
119 NextMI.mayLoad() == MI.mayLoad() && NextMI.mayStore() == MI.mayStore() && in canBundle()
120 ((NextMI.getDesc().TSFlags & MemFlags) == IMemFlags) && in canBundle()
121 !isDependentLoad(NextMI)); in canBundle()
H A DGCNRegPressure.cpp425 NextMI = &MI; in reset()
426 NextMI = skipDebugInstructionsForward(NextMI, MBBEnd); in reset()
427 if (NextMI == MBBEnd) in reset()
429 GCNRPTracker::reset(*NextMI, LiveRegsCopy, false); in reset()
436 return NextMI == MBBEnd; in advanceBeforeNext()
438 assert(NextMI == MBBEnd || !NextMI->isDebugInstr()); in advanceBeforeNext()
440 SlotIndex SI = NextMI == MBBEnd in advanceBeforeNext()
442 : LIS.getInstructionIndex(*NextMI).getBaseIndex(); in advanceBeforeNext()
484 return NextMI == MBBEnd; in advanceBeforeNext()
488 LastTrackedMI = &*NextMI++; in advanceToNext()
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H A DGCNHazardRecognizer.cpp2878 auto NextMI = std::next(MI->getIterator()); in fixVALUMaskWriteHazard() local
2881 BuildMI(*MI->getParent(), NextMI, MI->getDebugLoc(), in fixVALUMaskWriteHazard()
2888 while (NextMI != MI->getParent()->end() && in fixVALUMaskWriteHazard()
2889 NextMI->isBundledWithPred()) { in fixVALUMaskWriteHazard()
2890 for (auto &Operand : NextMI->operands()) { in fixVALUMaskWriteHazard()
2894 NextMI++; in fixVALUMaskWriteHazard()
2973 auto NextMI = std::next(It); in fixRequiredExportPriority() local
2975 if (NextMI != MBB->end()) { in fixRequiredExportPriority()
2977 if (TII.isEXP(*NextMI)) in fixRequiredExportPriority()
2980 if (NextMI->getOpcode() == AMDGPU::S_SETPRIO && in fixRequiredExportPriority()
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H A DGCNRegPressure.h222 MachineBasicBlock::const_iterator NextMI; variable
229 MachineBasicBlock::const_iterator getNext() const { return NextMI; } in getNext()
H A DSIShrinkInstructions.cpp837 if (auto *NextMI = matchSwap(MI)) { in runOnMachineFunction() local
838 Next = NextMI->getIterator(); in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DStackSlotColoring.cpp472 MachineBasicBlock::iterator NextMI = std::next(I); in RemoveDeadStores() local
482 while ((NextMI != E) && NextMI->isDebugInstr()) { in RemoveDeadStores()
483 ++NextMI; in RemoveDeadStores()
486 if (NextMI == E) continue; in RemoveDeadStores()
487 if (!(StoreReg = TII->isStoreToStackSlot(*NextMI, SecondSS, StoreSize))) in RemoveDeadStores()
496 if (NextMI->findRegisterUseOperandIdx(LoadReg, /*TRI=*/nullptr, true) != in RemoveDeadStores()
502 toErase.push_back(&*NextMI); in RemoveDeadStores()
H A DSlotIndexes.cpp160 MachineInstr &NextMI = *Next; in removeSingleMachineInstrFromMaps() local
161 MIEntry.setInstr(&NextMI); in removeSingleMachineInstrFromMaps()
162 mi2iMap.insert(std::make_pair(&NextMI, MIIndex)); in removeSingleMachineInstrFromMaps()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPostLegalizer.cpp136 MachineInstr *NextMI = I.getNextNode(); in processNewInstrs() local
137 if (NextMI && isMetaInstrGET(NextMI->getOpcode())) in processNewInstrs()
H A DSPIRVAsmPrinter.cpp255 const MachineInstr *NextMI = MI->getNextNode(); in emitInstruction() local
257 (!NextMI || !isFuncOrHeaderInstr(NextMI, TII))) { in emitInstruction()
H A DSPIRVBuiltins.cpp353 MachineInstr *NextMI = MI->getNextNode(); in getMachineInstrType() local
354 if (!NextMI) in getMachineInstrType()
356 if (isSpvIntrinsic(*NextMI, Intrinsic::spv_assign_name)) in getMachineInstrType()
357 if ((NextMI = NextMI->getNextNode()) == nullptr) in getMachineInstrType()
360 if ((!isSpvIntrinsic(*NextMI, Intrinsic::spv_assign_type) && in getMachineInstrType()
361 !isSpvIntrinsic(*NextMI, Intrinsic::spv_assign_ptr_type)) || in getMachineInstrType()
362 NextMI->getOperand(1).getReg() != ValueReg) in getMachineInstrType()
364 Type *Ty = getMDOperandAsType(NextMI->getOperand(2).getMetadata(), 0); in getMachineInstrType()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp249 MachineInstr *NextMI = LastMIs[Idx]; in FindMLxHazard() local
250 if (!NextMI) in FindMLxHazard()
253 if (TII->canCauseFpMLxStall(NextMI->getOpcode())) { in FindMLxHazard()
259 if (i <= Limit2 && hasRAWHazard(getDefReg(MI), NextMI)) in FindMLxHazard()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp1640 MachineInstr *NextMI = nullptr; in coalesceVSETVLIs() local
1672 NextMI = nullptr; in coalesceVSETVLIs()
1679 if (NextMI) { in coalesceVSETVLIs()
1686 if (canMutatePriorConfig(MI, *NextMI, Used)) { in coalesceVSETVLIs()
1687 if (!isVLPreservingConfig(*NextMI)) { in coalesceVSETVLIs()
1688 Register DefReg = NextMI->getOperand(0).getReg(); in coalesceVSETVLIs()
1713 if (NextMI->getOperand(1).isImm()) in coalesceVSETVLIs()
1714 MI.getOperand(1).ChangeToImmediate(NextMI->getOperand(1).getImm()); in coalesceVSETVLIs()
1716 MI.getOperand(1).ChangeToRegister(NextMI->getOperand(1).getReg(), false); in coalesceVSETVLIs()
1720 MI.setDesc(NextMI->getDesc()); in coalesceVSETVLIs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp421 for (auto NextMI = NextMBBI; NextMI != MBB.end(); NextMI++) { in shouldUseFrameHelper() local
422 if (NextMI->readsRegister(AArch64::W16, TRI)) in shouldUseFrameHelper()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp986 auto NextMI = std::find_if(std::next(MI.getIterator()), in LowerPATCHABLE_OP() local
993 if (NextMI != MI.getParent()->end() && !NextMI->isInlineAsm()) { in LowerPATCHABLE_OP()
998 MCIL.Lower(&*NextMI, MCI); in LowerPATCHABLE_OP()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp8321 for (MachineInstr &NextMI : llvm::make_range( in emitSelect()
8323 if (isSelectPseudo(NextMI)) { in emitSelect()
8324 assert(NextMI.getOperand(3).getImm() == CCValid && in emitSelect()
8326 if (NextMI.getOperand(4).getImm() == CCMask || in emitSelect()
8327 NextMI.getOperand(4).getImm() == (CCValid ^ CCMask)) { in emitSelect()
8328 Selects.push_back(&NextMI); in emitSelect()
8333 if (NextMI.definesRegister(SystemZ::CC, /*TRI=*/nullptr) || in emitSelect()
8334 NextMI.usesCustomInsertionHook()) in emitSelect()
8338 if (NextMI.readsVirtualRegister(SelMI->getOperand(0).getReg())) { in emitSelect()
8342 if (NextMI.isDebugInstr()) { in emitSelect()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DCodeViewDebug.cpp3135 for (const auto &NextMI : *MI->getParent()) { in beginCVSubsection()
3136 if (NextMI.isDebugInstr()) in beginCVSubsection()
3138 DL = NextMI.getDebugLoc(); in beginCVSubsection()