| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 105 Register NewVReg = MRI.createVirtualRegister(SrcRC); in processBlock() local
107 TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg) in processBlock()
114 SrcMO.setReg(NewVReg); in processBlock()
127 Register NewVReg = MRI.createVirtualRegister(DstRC); in processBlock() local
129 NewVReg) in processBlock()
133 SrcMO.setReg(NewVReg); in processBlock()
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| H A D | PPCVSXSwapRemoval.cpp | 925 Register NewVReg = MRI->createVirtualRegister(DstRC); in handleSpecialSwappables() local
927 MI->getOperand(0).setReg(NewVReg); in handleSpecialSwappables()
944 .addReg(NewVReg); in handleSpecialSwappables()
956 insertSwap(MI, InsertPoint, DstReg, NewVReg); in handleSpecialSwappables()
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| H A D | PPCMIPeephole.cpp | 1856 Register NewVReg = MRI->createVirtualRegister(&PPC::CRRCRegClass); in eliminateRedundantCompare() local
1858 TII->get(PPC::PHI), NewVReg) in eliminateRedundantCompare()
1861 BI2->getOperand(1).setReg(NewVReg); in eliminateRedundantCompare()
1862 addRegToUpdate(NewVReg); in eliminateRedundantCompare()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 683 Register NewVReg = Edit->createFrom(Original); in reMaterializeFor() local
687 Edit->rematerializeAt(*MI.getParent(), MI, NewVReg, RM, TRI); in reMaterializeFor()
702 MO.setReg(NewVReg); in reMaterializeFor()
1075 void InlineSpiller::insertReload(Register NewVReg, in insertReload() argument
1081 TII.loadRegFromStackSlot(MBB, MI, NewVReg, StackSlot, in insertReload()
1082 MRI.getRegClass(NewVReg), &TRI, Register()); in insertReload()
1087 NewVReg)); in insertReload()
1105 void InlineSpiller::insertSpill(Register NewVReg, bool isKill, in insertSpill() argument
1117 TII.storeRegToStackSlot(MBB, SpillBefore, NewVReg, isKill, StackSlot, in insertSpill()
1118 MRI.getRegClass(NewVReg), &TRI, Register()); in insertSpill()
[all …]
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| H A D | RegisterBankInfo.cpp | 718 for (Register &NewVReg : NewVRegsForOpIdx) { in createVRegs()
720 assert(NewVReg == 0 && "Register has already been created"); in createVRegs()
726 NewVReg = MRI.createGenericVirtualRegister(LLT::scalar(PartMap->Length)); in createVRegs()
727 MRI.setRegBank(NewVReg, *PartMap->RegBank); in createVRegs()
734 Register NewVReg) { in setVRegs() argument
743 NewVRegs[OpToNewVRegIdx[OpIdx] + PartialMapIdx] = NewVReg; in setVRegs()
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| H A D | RenameIndependentSubregs.cpp | 142 Register NewVReg = MRI->createVirtualRegister(RegClass); in INITIALIZE_PASS_DEPENDENCY() local
143 LiveInterval &NewLI = LIS->createEmptyInterval(NewVReg); in INITIALIZE_PASS_DEPENDENCY()
145 LLVM_DEBUG(dbgs() << ' ' << printReg(NewVReg)); in INITIALIZE_PASS_DEPENDENCY()
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| H A D | PeepholeOptimizer.cpp | 1294 Register NewVReg = MRI->createVirtualRegister(DefRC); in rewriteSource() local
1298 TII->get(TargetOpcode::COPY), NewVReg) in rewriteSource()
1309 MRI->replaceRegWith(Def.Reg, NewVReg); in rewriteSource()
1310 MRI->clearKillFlags(NewVReg); in rewriteSource()
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| H A D | LiveIntervals.cpp | 1775 Register NewVReg = MRI->cloneVirtualRegister(Reg); in splitSeparateComponents() local
1776 LiveInterval &NewLI = createEmptyInterval(NewVReg); in splitSeparateComponents()
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| H A D | RegAllocGreedy.cpp | 2042 for (Register NewVReg : CurrentNewVRegs) in tryLastChanceRecoloring() local
2043 NewVRegs.push_back(NewVReg); in tryLastChanceRecoloring()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 355 Register NewVReg = MRI->createVirtualRegister(OpRC); in AddRegisterOperand() local
357 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddRegisterOperand()
358 VReg = NewVReg; in AddRegisterOperand()
425 Register NewVReg = MRI->createVirtualRegister(IIRC); in AddOperand() local
427 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddOperand()
428 VReg = NewVReg; in AddOperand()
644 Register NewVReg = MRI->createVirtualRegister(DstRC); in EmitCopyToRegClassNode() local
646 NewVReg).addReg(VReg); in EmitCopyToRegClassNode()
649 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second; in EmitCopyToRegClassNode()
661 Register NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC)); in EmitRegSequence() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 363 void setVRegs(unsigned OpIdx, unsigned PartialMapIdx, Register NewVReg);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 635 unsigned *NewVReg = nullptr) { in canFoldIntoCSel() argument
697 if (NewVReg) in canFoldIntoCSel()
698 *NewVReg = DefMI->getOperand(SrcOpNum).getReg(); in canFoldIntoCSel()
857 unsigned NewVReg = 0; in insertSelect() local
858 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg); in insertSelect()
865 FoldedOpc = canFoldIntoCSel(MRI, FalseReg, &NewVReg); in insertSelect()
869 FalseReg = NewVReg; in insertSelect()
872 MRI.clearKillFlags(NewVReg); in insertSelect()
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