| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineSSAUpdater.cpp | 119 Register NewVR = MRI->createVirtualRegister(RegAttrs); in InsertNewDef() local
120 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef()
231 Register NewVR; in RewriteUse() local
234 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse()
236 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
242 if (NewVR) { in RewriteUse()
245 if (UseRC && !MRI->constrainRegClass(NewVR, UseRC)) { in RewriteUse()
250 .addReg(NewVR); in RewriteUse()
251 NewVR = InsertedCopy->getOperand(0).getReg(); in RewriteUse()
255 U.setReg(NewVR); in RewriteUse()
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| H A D | PeepholeOptimizer.cpp | 647 Register NewVR = MRI->createVirtualRegister(RC); in INITIALIZE_PASS_DEPENDENCY() local
649 TII->get(TargetOpcode::COPY), NewVR) in INITIALIZE_PASS_DEPENDENCY()
654 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
827 Register NewVR = MRI.createVirtualRegister(NewRC); in insertPHI() local
830 TII.get(TargetOpcode::PHI), NewVR); in insertPHI()
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| H A D | TargetInstrInfo.cpp | 1119 Register NewVR = MRI.createVirtualRegister(RC); in reassociateOps() local
1120 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in reassociateOps()
1177 buildMINoImplicit(*MF, MIMetadata(Prev), TII->get(NewPrevOpc), NewVR); in reassociateOps()
1193 std::swap(RegA, NewVR); in reassociateOps()
1207 MIB2 = MIB2.addReg(NewVR, getKillRegState(KillNewVR)); in reassociateOps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6816 Register NewVR = MRI.createVirtualRegister(RC); in genNeg() local
6818 BuildMI(MF, MIMetadata(Root), TII->get(MnegOpc), NewVR) in genNeg()
6823 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genNeg()
6825 return NewVR; in genNeg()
6837 Register NewVR = in genFusedMultiplyAccNeg() local
6840 FMAInstKind::Accumulator, &NewVR); in genFusedMultiplyAccNeg()
6864 Register NewVR = in genFusedMultiplyIdxNeg() local
6868 FMAInstKind::Indexed, &NewVR); in genFusedMultiplyIdxNeg()
6944 Register NewVR = MRI.createVirtualRegister(MRI.getRegClass(RegA)); in genSubAdd2SubSub() local
6960 BuildMI(MF, MIMetadata(Root), TII->get(Opcode), NewVR) in genSubAdd2SubSub()
[all …]
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| H A D | AArch64ISelLowering.cpp | 26887 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
26897 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
26904 .addReg(NewVR); in insertCopiesSplitCSR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1385 Register NewVR = MRI->createVirtualRegister(RC); in generateInserts() local
1386 RegMap[VR] = NewVR; in generateInserts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2302 Register NewVR = MRI.createVirtualRegister(&RISCV::GPRRegClass); in genShXAddAddShift() local
2304 auto MIB1 = BuildMI(*MF, MIMetadata(Root), TII->get(InnerOpc), NewVR) in genShXAddAddShift()
2309 .addReg(NewVR, RegState::Kill) in genShXAddAddShift()
2312 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genShXAddAddShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 9935 Register NewVR = in enforceOperandRCAlignment() local
9938 BuildMI(*BB, MI, DL, get(AMDGPU::REG_SEQUENCE), NewVR) in enforceOperandRCAlignment()
9943 Op.setReg(NewVR); in enforceOperandRCAlignment()
9945 MI.addOperand(MachineOperand::CreateReg(NewVR, false, true)); in enforceOperandRCAlignment()
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| H A D | SIISelLowering.cpp | 2781 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
2784 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
2791 .addReg(NewVR); in insertCopiesSplitCSR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 22085 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
22095 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
22102 .addReg(NewVR); in insertCopiesSplitCSR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 59283 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
59293 BuildMI(*Entry, MBBI, MIMetadata(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
59300 .addReg(NewVR); in insertCopiesSplitCSR()
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