| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineSSAUpdater.cpp | 119 Register NewVR = MRI->createVirtualRegister(RegAttrs); in InsertNewDef() local
120 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef()
231 Register NewVR; in RewriteUse() local
234 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse()
236 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
242 if (NewVR) { in RewriteUse()
245 if (UseRC && !MRI->constrainRegClass(NewVR, UseRC)) { in RewriteUse()
250 .addReg(NewVR); in RewriteUse()
251 NewVR = InsertedCopy->getOperand(0).getReg(); in RewriteUse()
255 U.setReg(NewVR); in RewriteUse()
|
| H A D | TargetInstrInfo.cpp | 1100 auto NewVR = MRI.createVirtualRegister( in reduceAccumulatorTree() local
1102 Dest = NewVR; in reduceAccumulatorTree()
1351 Register NewVR = MRI.createVirtualRegister(RC); in reassociateOps() local
1352 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in reassociateOps()
1409 buildMINoImplicit(*MF, MIMetadata(Prev), TII->get(NewPrevOpc), NewVR); in reassociateOps()
1425 std::swap(RegA, NewVR); in reassociateOps()
1439 MIB2 = MIB2.addReg(NewVR, getKillRegState(KillNewVR)); in reassociateOps()
|
| H A D | PeepholeOptimizer.cpp | 921 Register NewVR = MRI->createVirtualRegister(RC); in INITIALIZE_PASS_DEPENDENCY() local
923 TII->get(TargetOpcode::COPY), NewVR) in INITIALIZE_PASS_DEPENDENCY()
928 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
1103 Register NewVR = MRI.createVirtualRegister(NewRC); in insertPHI() local
1106 TII.get(TargetOpcode::PHI), NewVR); in insertPHI()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 7612 Register NewVR = MRI.createVirtualRegister(RC); in genNeg() local
7614 BuildMI(MF, MIMetadata(Root), TII->get(MnegOpc), NewVR) in genNeg()
7619 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genNeg()
7621 return NewVR; in genNeg()
7633 Register NewVR = in genFusedMultiplyAccNeg() local
7636 FMAInstKind::Accumulator, &NewVR); in genFusedMultiplyAccNeg()
7660 Register NewVR = in genFusedMultiplyIdxNeg() local
7664 FMAInstKind::Indexed, &NewVR); in genFusedMultiplyIdxNeg()
7739 Register NewVR = in genSubAdd2SubSub() local
7756 BuildMI(MF, MIMetadata(Root), TII->get(Opcode), NewVR) in genSubAdd2SubSub()
[all …]
|
| H A D | AArch64ISelLowering.cpp | 28465 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
28475 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
28482 .addReg(NewVR); in insertCopiesSplitCSR()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1381 Register NewVR = MRI->createVirtualRegister(RC); in generateInserts() local
1382 RegMap[VR] = NewVR; in generateInserts()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2721 Register NewVR = MRI.createVirtualRegister(&RISCV::GPRRegClass); in genShXAddAddShift() local
2723 auto MIB1 = BuildMI(*MF, MIMetadata(Root), TII->get(InnerOpc), NewVR) in genShXAddAddShift()
2728 .addReg(NewVR, RegState::Kill) in genShXAddAddShift()
2731 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genShXAddAddShift()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 10409 Register NewVR = in enforceOperandRCAlignment() local
10412 BuildMI(*BB, MI, DL, get(AMDGPU::REG_SEQUENCE), NewVR) in enforceOperandRCAlignment()
10417 Op.setReg(NewVR); in enforceOperandRCAlignment()
10419 MI.addOperand(MachineOperand::CreateReg(NewVR, false, true)); in enforceOperandRCAlignment()
|
| H A D | SIISelLowering.cpp | 2887 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
2890 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
2897 .addReg(NewVR); in insertCopiesSplitCSR()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 22009 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
22019 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
22026 .addReg(NewVR); in insertCopiesSplitCSR()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 62053 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
62063 BuildMI(*Entry, MBBI, MIMetadata(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
62070 .addReg(NewVR); in insertCopiesSplitCSR()
|