Searched refs:NewV2 (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15204 SDValue NewV2 = DAG.getVectorShuffle(VT, DL, V1, V2, NewMask); in lowerShuffleAsLanePermuteAndRepeatedMask() local
15208 if (isa<ShuffleVectorSDNode>(NewV2) && in lowerShuffleAsLanePermuteAndRepeatedMask()
15209 cast<ShuffleVectorSDNode>(NewV2)->getMask() == Mask) in lowerShuffleAsLanePermuteAndRepeatedMask()
15223 return DAG.getVectorShuffle(VT, DL, NewV1, NewV2, NewMask); in lowerShuffleAsLanePermuteAndRepeatedMask()
38865 SDValue NewV2 = V2; in combineX86ShuffleChain() local
38867 NewV2, DL, DAG, Subtarget, Shuffle, ShuffleSrcVT, in combineX86ShuffleChain()
38873 NewV2 = CanonicalizeShuffleInput(ShuffleSrcVT, NewV2); in combineX86ShuffleChain()
38874 Res = DAG.getNode(Shuffle, DL, ShuffleVT, NewV1, NewV2); in combineX86ShuffleChain()
38879 NewV2 = V2; in combineX86ShuffleChain()
38881 AllowIntDomain, NewV1, NewV2, DL, DAG, in combineX86ShuffleChain()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9162 SDValue NewV2 = PromoteMVEPredVector(dl, V2, Op2VT, DAG); in LowerCONCAT_VECTORS_i1() local
9175 DAG.getNode(ARMISD::MVETRUNC, dl, ConcatVT, NewV1, NewV2); in LowerCONCAT_VECTORS_i1()
9204 ConVec = ExtractInto(NewV2, ConVec, j); in LowerCONCAT_VECTORS_i1()
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