Searched refs:NewSubReg (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRewritePartialRegUses.cpp | 215 for (auto &[OldSubReg, NewSubReg] : SubRegs) { in getRegClassWithShiftedSubregs()
230 NewSubReg = AMDGPU::NoSubRegister; in getRegClassWithShiftedSubregs()
233 NewSubReg = shiftSubReg(OldSubReg, RShift); in getRegClassWithShiftedSubregs()
234 if (!NewSubReg) { in getRegClassWithShiftedSubregs()
238 LLVM_DEBUG(dbgs() << TRI->getSubRegIndexName(NewSubReg)); in getRegClassWithShiftedSubregs()
241 const uint32_t *Mask = NewSubReg ? getSuperRegClassMask(SubRegRC, NewSubReg) in getRegClassWithShiftedSubregs()
269 for (auto [OldSubReg, NewSubReg] : SubRegs) in getRegClassWithShiftedSubregs()
271 assert(MinRC == TRI->getSubClassWithSubReg(MinRC, NewSubReg)); in getRegClassWithShiftedSubregs()
374 if (unsigned NewSubReg = I->second) in updateLiveIntervals() local
376 TRI->getSubRegIndexLaneMask(NewSubReg), SR); in updateLiveIntervals()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 190 virtual bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) = 0;
215 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
218 MOSrc.setSubReg(NewSubReg); in RewriteCurrentSource()
258 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
302 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
308 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
349 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
358 if (!NewSubReg) { in RewriteCurrentSource()
370 CopyLike.getOperand(CurrentSrcIdx + 1).setImm(NewSubReg); in RewriteCurrentSource()
420 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.cpp | 458 std::pair<CodeGenSubRegIndex *, CodeGenRegister *> NewSubReg = { in computeSecondarySubRegs() local
461 if (!SubRegs.insert(NewSubReg).second) in computeSecondarySubRegs()
465 NewSubRegs.push_back(NewSubReg); in computeSecondarySubRegs()
466 SubRegQueue.push(NewSubReg); in computeSecondarySubRegs()
472 for (auto [NewIdx, NewSubReg] : NewSubRegs) { in computeSecondarySubRegs()
473 for (auto [SRI, SubReg] : NewSubReg->SubRegs) { in computeSecondarySubRegs()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2667 unsigned NewSubReg = UseMI->getOperand(3).getSubReg(); in optimizeCompareInstr() local
2668 assert((!equalityOnly || NewSubReg == PPC::sub_eq) && in optimizeCompareInstr()
2671 if (NewSubReg == PPC::sub_lt) in optimizeCompareInstr()
2672 NewSubReg = PPC::sub_gt; in optimizeCompareInstr()
2673 else if (NewSubReg == PPC::sub_gt) in optimizeCompareInstr()
2674 NewSubReg = PPC::sub_lt; in optimizeCompareInstr()
2677 NewSubReg)); in optimizeCompareInstr()
|