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Searched refs:NewSub (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp1306 auto *NewSub = BinaryOperator::CreateNUWSub(X, NewLshr); in visitLShr() local
1307 NewSub->setHasNoSignedWrap( in visitLShr()
1309 return NewSub; in visitLShr()
1323 auto *NewSub = BinaryOperator::CreateNUWSub(NewLshr, Y); in visitLShr() local
1324 NewSub->setHasNoSignedWrap( in visitLShr()
1326 return NewSub; in visitLShr()
H A DInstCombineAddSub.cpp2652 Value *NewSub = SubBuilder(OtherHandOfSubIsTrueVal ? FalseVal : TrueVal); in visitSub() local
2655 SelectInst::Create(Cond, OtherHandOfSubIsTrueVal ? Zero : NewSub, in visitSub()
2656 OtherHandOfSubIsTrueVal ? NewSub : Zero); in visitSub()
3109 Value *NewSub = Builder.CreateFSubFMF(Y, X, &I); in visitFSub() local
3110 return BinaryOperator::CreateFAddFMF(Op0, NewSub, &I); in visitFSub()
H A DInstCombineCalls.cpp2549 auto *NewSub = in visitCallInst() local
2551 return replaceInstUsesWith(*SI, NewSub); in visitCallInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp242 unsigned NewSub = Hexagon::NoSubRegister);
947 unsigned NewSub) { in hasTiedUse() argument
951 [NewSub] (const MachineOperand &Op) -> bool { in hasTiedUse()
952 return Op.getSubReg() != NewSub && Op.isTied(); in hasTiedUse()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1339 SDValue NewSub = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
1343 if (NewSub || NewSrc) { in SimplifyDemandedBits()
1344 NewSub = NewSub ? NewSub : Sub; in SimplifyDemandedBits()
1346 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc, NewSub, in SimplifyDemandedBits()
3480 SDValue NewSub = SimplifyMultipleUseDemandedVectorElts( in SimplifyDemandedVectorElts() local
3482 if (NewSrc || NewSub) { in SimplifyDemandedVectorElts()
3484 NewSub = NewSub ? NewSub : Sub; in SimplifyDemandedVectorElts()
3486 NewSub, Op.getOperand(2)); in SimplifyDemandedVectorElts()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp49167 SDValue NewSub = in combineCMov() local
49170 SDValue EFLAGS(NewSub.getNode(), 1); in combineCMov()
52207 SDValue NewSub = DAG.getNode( in combineAddOrSubToADCOrSBB() local
52210 SDValue NewEFLAGS = SDValue(NewSub.getNode(), EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
52239 SDValue NewSub = in combineAddOrSubToADCOrSBB() local
52242 SDValue NewEFLAGS = NewSub.getValue(EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
52269 SDValue NewSub = in combineAddOrSubToADCOrSBB() local
52272 SDValue NewEFLAGS = NewSub.getValue(EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp21085 SDValue NewSub = DAG.getNode(ISD::SUB, DL, VT, Z, Y); in performAddCombineSubShift() local
21086 return DAG.getNode(ISD::ADD, DL, VT, NewSub, Shift); in performAddCombineSubShift()