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Searched refs:NewSub (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp1284 auto *NewSub = BinaryOperator::CreateNUWSub(X, NewLshr); in visitLShr() local
1285 NewSub->setHasNoSignedWrap( in visitLShr()
1287 return NewSub; in visitLShr()
1301 auto *NewSub = BinaryOperator::CreateNUWSub(NewLshr, Y); in visitLShr() local
1302 NewSub->setHasNoSignedWrap( in visitLShr()
1304 return NewSub; in visitLShr()
H A DInstCombineAddSub.cpp2491 Value *NewSub = SubBuilder(OtherHandOfSubIsTrueVal ? FalseVal : TrueVal); in visitSub() local
2494 SelectInst::Create(Cond, OtherHandOfSubIsTrueVal ? Zero : NewSub, in visitSub()
2495 OtherHandOfSubIsTrueVal ? NewSub : Zero); in visitSub()
2872 Value *NewSub = Builder.CreateFSubFMF(Y, X, &I); in visitFSub() local
2873 return BinaryOperator::CreateFAddFMF(Op0, NewSub, &I); in visitFSub()
H A DInstCombineCalls.cpp2258 auto *NewSub = in visitCallInst() local
2260 return replaceInstUsesWith(*SI, NewSub); in visitCallInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp264 unsigned NewSub = Hexagon::NoSubRegister);
969 unsigned NewSub) { in hasTiedUse() argument
973 [NewSub] (const MachineOperand &Op) -> bool { in hasTiedUse()
974 return Op.getSubReg() != NewSub && Op.isTied(); in hasTiedUse()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1284 SDValue NewSub = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
1288 if (NewSub || NewSrc) { in SimplifyDemandedBits()
1289 NewSub = NewSub ? NewSub : Sub; in SimplifyDemandedBits()
1291 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc, NewSub, in SimplifyDemandedBits()
3339 SDValue NewSub = SimplifyMultipleUseDemandedVectorElts( in SimplifyDemandedVectorElts() local
3341 if (NewSrc || NewSub) { in SimplifyDemandedVectorElts()
3343 NewSub = NewSub ? NewSub : Sub; in SimplifyDemandedVectorElts()
3345 NewSub, Op.getOperand(2)); in SimplifyDemandedVectorElts()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp47405 SDValue NewSub = in combineCMov() local
47408 SDValue EFLAGS(NewSub.getNode(), 1); in combineCMov()
50475 SDValue NewSub = DAG.getNode( in combineAddOrSubToADCOrSBB() local
50478 SDValue NewEFLAGS = SDValue(NewSub.getNode(), EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
50507 SDValue NewSub = in combineAddOrSubToADCOrSBB() local
50510 SDValue NewEFLAGS = NewSub.getValue(EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
50537 SDValue NewSub = in combineAddOrSubToADCOrSBB() local
50540 SDValue NewEFLAGS = NewSub.getValue(EFLAGS.getResNo()); in combineAddOrSubToADCOrSBB()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp20341 SDValue NewSub = DAG.getNode(ISD::SUB, DL, VT, Z, Y); in performAddCombineSubShift() local
20342 return DAG.getNode(ISD::ADD, DL, VT, NewSub, Shift); in performAddCombineSubShift()