Searched refs:NewSrcReg (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupBWInsts.cpp | 316 Register NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy() local
317 assert(NewSrcReg.isValid() && "Invalid Operand"); in tryReplaceCopy()
322 if (TRI->getSubRegIndex(NewSrcReg, OldSrc.getReg()) != in tryReplaceCopy()
333 .addReg(NewSrcReg, RegState::Undef) in tryReplaceCopy()
338 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 978 MCRegister NewSrcReg = RI.get32BitRegister(SrcReg); in copyPhysReg() local
987 .addReg(NewSrcReg, getKillRegState(KillSrc)); in copyPhysReg()
997 copyPhysReg(MBB, MI, DL, NewDestReg, NewSrcReg, KillSrc); in copyPhysReg()
1004 SrcReg = NewSrcReg; in copyPhysReg()
1027 .addReg(NewSrcReg, getKillRegState(KillSrc)); in copyPhysReg()
1033 .addReg(NewSrcReg) in copyPhysReg()
6368 Register NewSrcReg = MRI.createVirtualRegister(VRC); in readlaneVGPRToSGPR() local
6370 get(TargetOpcode::COPY), NewSrcReg) in readlaneVGPRToSGPR()
6372 SrcReg = NewSrcReg; in readlaneVGPRToSGPR()
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| H A D | AMDGPURegisterBankInfo.cpp | 2318 Register NewSrcReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl() local
2319 MRI.setRegBank(NewSrcReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2320 B.buildZExt(NewSrcReg, MI.getOperand(4).getReg()); in applyMappingImpl()
2321 MI.getOperand(4).setReg(NewSrcReg); in applyMappingImpl()
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