Searched refs:NewSrcReg (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupBWInsts.cpp | 317 Register NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32); in tryReplaceCopy() local
318 assert(NewSrcReg.isValid() && "Invalid Operand"); in tryReplaceCopy()
323 if (TRI->getSubRegIndex(NewSrcReg, OldSrc.getReg()) != in tryReplaceCopy()
334 .addReg(NewSrcReg, RegState::Undef) in tryReplaceCopy()
339 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 960 MCRegister NewSrcReg = RI.get32BitRegister(SrcReg); in copyPhysReg() local
969 .addReg(NewSrcReg, getKillRegState(KillSrc)); in copyPhysReg()
979 copyPhysReg(MBB, MI, DL, NewDestReg, NewSrcReg, KillSrc); in copyPhysReg()
986 SrcReg = NewSrcReg; in copyPhysReg()
1009 .addReg(NewSrcReg, getKillRegState(KillSrc)); in copyPhysReg()
1015 .addReg(NewSrcReg) in copyPhysReg()
6066 Register NewSrcReg = MRI.createVirtualRegister(VRC); in readlaneVGPRToSGPR() local
6068 get(TargetOpcode::COPY), NewSrcReg) in readlaneVGPRToSGPR()
6070 SrcReg = NewSrcReg; in readlaneVGPRToSGPR()
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| H A D | AMDGPURegisterBankInfo.cpp | 2290 Register NewSrcReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl() local
2291 MRI.setRegBank(NewSrcReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2292 B.buildZExt(NewSrcReg, MI.getOperand(4).getReg()); in applyMappingImpl()
2293 MI.getOperand(4).setReg(NewSrcReg); in applyMappingImpl()
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