| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 1200 RegSubRegPair NewSrc = getNewSource(MRI, TII, TrackPair, RewriteMap, in optimizeCoalescableCopyImpl() local 1202 assert(TrackPair.Reg != NewSrc.Reg && in optimizeCoalescableCopyImpl() 1204 if (!NewSrc.Reg) in optimizeCoalescableCopyImpl() 1208 if (CpyRewriter.RewriteCurrentSource(NewSrc.Reg, NewSrc.SubReg)) { in optimizeCoalescableCopyImpl() 1210 MRI->clearKillFlags(NewSrc.Reg); in optimizeCoalescableCopyImpl() 1273 RegSubRegPair NewSrc = getNewSource(MRI, TII, Def, RewriteMap); in rewriteSource() local 1282 .addReg(NewSrc.Reg, 0, NewSrc.SubReg); in rewriteSource() 1297 MRI->clearKillFlags(NewSrc.Reg); in rewriteSource()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/ |
| H A D | DependencyGraph.h | 398 LLVM_ABI void notifySetUse(const Use &U, Value *NewSrc); 413 [this](const Use &U, Value *NewSrc) { notifySetUse(U, NewSrc); }); in DependencyGraph()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVStructurizer.cpp | 439 BasicBlock *NewSrc = BasicBlock::Create( in createAliasBlocksForComplexEdges() local 441 replaceBranchTargets(Src, Dst, NewSrc); in createAliasBlocksForComplexEdges() 442 IRBuilder<> Builder(NewSrc); in createAliasBlocksForComplexEdges() 444 Src = NewSrc; in createAliasBlocksForComplexEdges()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/ |
| H A D | DependencyGraph.cpp | 525 void DependencyGraph::notifySetUse(const Use &U, Value *NewSrc) { in notifySetUse() argument 533 if (auto *NewSrcI = dyn_cast<Instruction>(NewSrc)) { in notifySetUse()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/SandboxIR/ |
| H A D | Context.h | 142 LLVM_ABI void runSetUseCallbacks(const Use &U, Value *NewSrc);
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SeparateConstOffsetFromGEP.cpp | 1035 Value *NewSrc = Builder.CreateGEP( in reorderGEP() local 1038 Value *NewGEP = Builder.CreateGEP(PtrGEP->getSourceElementType(), NewSrc, in reorderGEP()
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| H A D | LICM.cpp | 2540 Value *NewSrc = Builder.CreateGEP(GEP->getSourceElementType(), SrcPtr, in hoistGEP() local 2544 Value *NewGEP = Builder.CreateGEP(Src->getSourceElementType(), NewSrc, in hoistGEP()
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| /freebsd/contrib/llvm-project/llvm/lib/SandboxIR/ |
| H A D | Context.cpp | 717 void Context::runSetUseCallbacks(const Use &U, Value *NewSrc) { in runSetUseCallbacks() argument 719 CBEntry.second(U, NewSrc); in runSetUseCallbacks()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 359 unsigned LEAOpcode, bool AllowSP, Register &NewSrc,
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| H A D | X86InstrInfo.cpp | 1146 unsigned Opc, bool AllowSP, Register &NewSrc, in classifyLEAReg() argument 1166 NewSrc = SrcReg; in classifyLEAReg() 1170 if (NewSrc.isVirtual() && !MF.getRegInfo().constrainRegClass(NewSrc, RC)) in classifyLEAReg() 1182 NewSrc = getX86SubSuperRegister(SrcReg, 64); in classifyLEAReg() 1184 assert(NewSrc.isValid() && "Invalid Operand"); in classifyLEAReg() 1189 NewSrc = MF.getRegInfo().createVirtualRegister(RC); in classifyLEAReg() 1193 .addReg(NewSrc, RegState::Define | RegState::Undef, X86::sub_32bit) in classifyLEAReg()
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| H A D | X86ISelLowering.cpp | 10627 SDValue NewSrc = widenSubVector(Src, ZeroUppers, Subtarget, DAG, DL, 512); in getAVX512TruncNode() local 10628 return getAVX512TruncNode(DL, DstVT, NewSrc, Subtarget, DAG, ZeroUppers); in getAVX512TruncNode() 43587 if (SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts( in SimplifyDemandedVectorEltsForTargetNode() local 43590 Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc, Op.getOperand(1))); in SimplifyDemandedVectorEltsForTargetNode() 43966 if (SDValue NewSrc = SimplifyMultipleUseDemandedVectorElts( in SimplifyDemandedVectorEltsForTargetNode() local 43968 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc)); in SimplifyDemandedVectorEltsForTargetNode() 44776 SDValue NewSrc = in SimplifyDemandedBitsForTargetNode() local 44780 TLO.DAG.getNode(X86ISD::VBROADCAST, SDLoc(Op), NewVT, NewSrc); in SimplifyDemandedBitsForTargetNode() 44805 SDValue NewSrc = extract128BitVector(Src, 0, TLO.DAG, SDLoc(Src)); in SimplifyDemandedBitsForTargetNode() local 44806 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc)); in SimplifyDemandedBitsForTargetNode() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1341 SDValue NewSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local 1343 if (NewSub || NewSrc) { in SimplifyDemandedBits() 1345 NewSrc = NewSrc ? NewSrc : Src; in SimplifyDemandedBits() 1346 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc, NewSub, in SimplifyDemandedBits() 2523 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local 2525 return TLO.CombineTo(Op, TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc)); in SimplifyDemandedBits() 2586 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local 2588 return TLO.CombineTo(Op, TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc)); in SimplifyDemandedBits() 2617 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local 2619 return TLO.CombineTo(Op, TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc)); in SimplifyDemandedBits() [all …]
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| H A D | LegalizeVectorTypes.cpp | 2729 SDValue NewSrc = in SplitVecRes_ExtendOp() local 2732 std::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl); in SplitVecRes_ExtendOp() 2740 SDValue NewSrc = in SplitVecRes_ExtendOp() local 2744 std::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl); in SplitVecRes_ExtendOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2193 Register NewSrc = Copy.getReg(0); in preISelLower() local 2194 SrcOp.setReg(NewSrc); in preISelLower() 2195 RBI.constrainGenericRegister(NewSrc, AArch64::GPR64RegClass, MRI); in preISelLower() 2225 auto NewSrc = MIB.buildCopy(LLT::scalar(64), I.getOperand(1).getReg()); in preISelLower() local 2228 MRI.setRegClass(NewSrc.getReg(0), &AArch64::GPR64RegClass); in preISelLower() 2229 I.getOperand(1).setReg(NewSrc.getReg(0)); in preISelLower() 2238 auto NewSrc = MIB.buildCopy(LLT::scalar(64), I.getOperand(2).getReg()); in preISelLower() local 2243 MRI.setRegClass(NewSrc.getReg(0), &AArch64::GPR64RegClass); in preISelLower() 2244 I.getOperand(2).setReg(NewSrc.getReg(0)); in preISelLower()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 884 SDValue NewSrc = DAG.getNode(ISD::BITCAST, DL, NewVT, Src); in lowerBITREVERSE() local 888 SDValue Op = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i64, NewSrc, in lowerBITREVERSE() 4113 SDValue NewSrc = DAG.getNode(ISD::ANY_EXTEND, DL, GRLenVT, Src); in ReplaceNodeResults() local 4119 Tmp = DAG.getNode(LoongArchISD::REVB_2H, DL, GRLenVT, NewSrc); in ReplaceNodeResults() 4124 Tmp = DAG.getNode(LoongArchISD::REVB_2W, DL, GRLenVT, NewSrc); in ReplaceNodeResults() 4135 SDValue NewSrc = DAG.getNode(ISD::ANY_EXTEND, DL, GRLenVT, Src); in ReplaceNodeResults() local 4141 Tmp = DAG.getNode(LoongArchISD::BITREV_4B, DL, GRLenVT, NewSrc); in ReplaceNodeResults() 4144 Tmp = DAG.getNode(LoongArchISD::BITREV_W, DL, GRLenVT, NewSrc); in ReplaceNodeResults() 8583 if (SDValue NewSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBitsForTargetNode() local 8585 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc)); in SimplifyDemandedBitsForTargetNode()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | ItaniumCXXABI.cpp | 981 llvm::PHINode *NewSrc = Builder.CreatePHI(src->getType(), 2); in EmitMemberPointerConversion() local 982 NewSrc->addIncoming(src, StartBB); in EmitMemberPointerConversion() 983 NewSrc->addIncoming(ResignedVal, ResignBB); in EmitMemberPointerConversion() 984 src = NewSrc; in EmitMemberPointerConversion()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenDAGPatterns.cpp | 4453 TreePatternNodePtr NewSrc = P.getSrcPattern().clone(); in ExpandHwModeBasedTypes() local 4455 if (!NewSrc->setDefaultMode(Mode) || !NewDst->setDefaultMode(Mode)) { in ExpandHwModeBasedTypes() 4460 std::move(NewSrc), std::move(NewDst), in ExpandHwModeBasedTypes()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4265 auto *NewSrc = OldToNewSrcMap[MRI.getVRegDef(MO.getReg())]; in applyExtendThroughPhis() local 4266 NewPhi.addUse(NewSrc->getOperand(0).getReg()); in applyExtendThroughPhis()
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