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Searched refs:NewShiftOp (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp445 BinaryOperator *NewShiftOp = BinaryOperator::Create(I.getOpcode(), NewC, A); in commonShiftTransforms() local
447 NewShiftOp->setHasNoSignedWrap(I.hasNoSignedWrap()); in commonShiftTransforms()
448 NewShiftOp->setHasNoUnsignedWrap(I.hasNoUnsignedWrap()); in commonShiftTransforms()
450 NewShiftOp->setIsExact(I.isExact()); in commonShiftTransforms()
452 return NewShiftOp; in commonShiftTransforms()
485 BinaryOperator *NewShiftOp = in commonShiftTransforms() local
488 NewShiftOp->setHasNoUnsignedWrap(I.hasNoUnsignedWrap()); in commonShiftTransforms()
490 NewShiftOp->setIsExact(); in commonShiftTransforms()
492 return NewShiftOp; in commonShiftTransforms()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp759 unsigned NewShiftOp; in SelectShiftedRegisterFromAnd() local
767 NewShiftOp = VT == MVT::i64 ? AArch64::UBFMXri : AArch64::UBFMWri; in SelectShiftedRegisterFromAnd()
786 NewShiftOp = VT == MVT::i64 ? AArch64::UBFMXri : AArch64::UBFMWri; in SelectShiftedRegisterFromAnd()
788 NewShiftOp = VT == MVT::i64 ? AArch64::SBFMXri : AArch64::SBFMWri; in SelectShiftedRegisterFromAnd()
794 Reg = SDValue(CurDAG->getMachineNode(NewShiftOp, DL, VT, LHS->getOperand(0), in SelectShiftedRegisterFromAnd()