| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 2297 Value *NewOp1 = in foldBitwiseLogicWithIntrinsics() local
2301 return CallInst::Create(F, {NewOp0, NewOp1, X->getOperand(2)}); in foldBitwiseLogicWithIntrinsics()
2344 Value *NewOp1 = simplifyAndOrWithOpReplaced(I->getOperand(1), Op, RepOp, in simplifyAndOrWithOpReplaced() local
2346 if (!NewOp0 && !NewOp1) in simplifyAndOrWithOpReplaced()
2351 if (!NewOp1) in simplifyAndOrWithOpReplaced()
2352 NewOp1 = I->getOperand(1); in simplifyAndOrWithOpReplaced()
2354 if (Value *Res = simplifyBinOp(I->getOpcode(), NewOp0, NewOp1, in simplifyAndOrWithOpReplaced()
2360 return IC.Builder.CreateBinOp(I->getOpcode(), NewOp0, NewOp1); in simplifyAndOrWithOpReplaced()
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| H A D | InstCombineCompares.cpp | 6413 Value *NewOp1 = nullptr; in foldICmpWithCastOp() local
6417 NewOp1 = PtrToIntOp1->getOperand(0); in foldICmpWithCastOp()
6419 NewOp1 = ConstantExpr::getIntToPtr(RHSC, SrcTy); in foldICmpWithCastOp()
6422 if (NewOp1) in foldICmpWithCastOp()
6423 return new ICmpInst(ICmp.getPredicate(), Op0Src, NewOp1); in foldICmpWithCastOp()
6429 Value *NewOp1 = nullptr; in foldICmpWithCastOp() local
6433 NewOp1 = IntToPtrOp1->getOperand(0); in foldICmpWithCastOp()
6435 NewOp1 = ConstantFoldConstant(ConstantExpr::getPtrToInt(RHSC, SrcTy), DL); in foldICmpWithCastOp()
6438 if (NewOp1) in foldICmpWithCastOp()
6439 return new ICmpInst(ICmp.getPredicate(), Op0Src, NewOp1); in foldICmpWithCastOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 14046 SDValue NewOp1 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOp() local
14047 SDValue NewRes = DAG.getNode(WOpcode, DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOp()
14057 SDValue NewOp1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOpWithSExt() local
14058 SDValue NewWOp = DAG.getNode(N->getOpcode(), DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOpWithSExt()
14297 SDValue NewOp1 = in ReplaceNodeResults() local
14299 SDValue NewWOp = DAG.getNode(ISD::SHL, DL, MVT::i64, NewOp0, NewOp1); in ReplaceNodeResults()
14657 SDValue NewOp1 = in ReplaceNodeResults() local
14660 DAG.getNode(Opc, DL, MVT::i64, NewOp0, NewOp1, N->getOperand(3)); in ReplaceNodeResults()
14680 SDValue NewOp1 = in ReplaceNodeResults() local
14683 RISCVISD::MOPRR, DL, MVT::i64, NewOp0, NewOp1, in ReplaceNodeResults()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 3832 SDValue NewOp1 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOp() local
3835 NewOp1 = DAG.getNode(ISD::SUB, DL, MVT::i64, TmpOp, NewOp1); in customLegalizeToWOp()
3837 NewRes = DAG.getNode(WOpcode, DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOp()
3853 SDValue NewOp1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOpWithSExt() local
3854 SDValue NewWOp = DAG.getNode(N->getOpcode(), DL, MVT::i64, NewOp0, NewOp1); in customLegalizeToWOpWithSExt()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10282 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitRotate() local
10283 return DAG.getNode(N->getOpcode(), dl, VT, N0, NewOp1); in visitRotate()
10367 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitSHL() local
10368 return DAG.getNode(ISD::SHL, DL, VT, N0, NewOp1); in visitSHL()
10912 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitSRA() local
10913 return DAG.getNode(ISD::SRA, DL, VT, N0, NewOp1); in visitSRA()
11161 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode())) in visitSRL() local
11162 return DAG.getNode(ISD::SRL, DL, VT, N0, NewOp1); in visitSRL()
19647 SDValue NewOp1 = DAG.getConstant(CNV, DL, CN->getValueType(0)); in CombineToPreIndexedLoadStore() local
19651 DAG.getNode(Opcode, DL, OtherUse->getValueType(0), NewOp1, NewOp2); in CombineToPreIndexedLoadStore()
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| H A D | TargetLowering.cpp | 3221 SDValue NewOp1 = SimplifyMultipleUseDemandedVectorElts(Op1, DemandedElts, in SimplifyDemandedVectorElts() local
3223 if (NewOp0 || NewOp1) { in SimplifyDemandedVectorElts()
3226 NewOp1 ? NewOp1 : Op1, Op->getFlags()); in SimplifyDemandedVectorElts()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 9460 auto NewOp1 = MIRBuilder.buildAnd(MaskTy, Op1Reg, MaskReg); in lowerSelect() local
9463 auto Or = MIRBuilder.buildOr(DstTy, NewOp1, NewOp2); in lowerSelect()
9466 MIRBuilder.buildOr(DstReg, NewOp1, NewOp2); in lowerSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 8823 SDValue NewOp1 = DAG.getSplatBuildVector(VT, DL, Op1); in lowerBuildVectorAsBlend() local
8824 return DAG.getVectorShuffle(VT, DL, NewOp0, NewOp1, Mask); in lowerBuildVectorAsBlend()
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