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Searched refs:NewN1 (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp43830 SDValue NewN1 = SimplifyMultipleUseDemandedVectorElts(N1, DemandedRHS, in SimplifyDemandedVectorEltsForTargetNode() local
43832 if (NewN0 || NewN1) { in SimplifyDemandedVectorEltsForTargetNode()
43834 NewN1 = NewN1 ? NewN1 : N1; in SimplifyDemandedVectorEltsForTargetNode()
43836 TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewN0, NewN1)); in SimplifyDemandedVectorEltsForTargetNode()
43867 SDValue NewN1 = SimplifyMultipleUseDemandedVectorElts(N1, DemandedRHS, in SimplifyDemandedVectorEltsForTargetNode() local
43869 if (NewN0 || NewN1) { in SimplifyDemandedVectorEltsForTargetNode()
43871 NewN1 = NewN1 ? NewN1 : N1; in SimplifyDemandedVectorEltsForTargetNode()
43873 TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewN0, NewN1)); in SimplifyDemandedVectorEltsForTargetNode()
49354 SDValue NewN1 = DAG.getNode(ISD::TRUNCATE, DL, ReducedVT, N1); in reduceVMULWidth() local
49358 SDValue MulLo = DAG.getNode(ISD::MUL, DL, ReducedVT, NewN0, NewN1); in reduceVMULWidth()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp5274 SDValue NewN1 = CmpZero ? DAG.getConstant(0, dl, OpVT) : LoBits; in SimplifySetCC() local
5275 return DAG.getSetCC(dl, VT, NewN0, NewN1, Cond); in SimplifySetCC()
H A DDAGCombiner.cpp19265 if (SDValue NewN1 = rebuildSetCC(N1)) in visitBRCOND() local
19267 ChainHandle.getValue(), NewN1, N2, N->getFlags()); in visitBRCOND()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp14776 SDValue NewN1 = DAG.getLogicalNOT(DL, N1, VT); in PerformORCombine_i1() local
14777 SDValue And = DAG.getNode(ISD::AND, DL, VT, NewN0, NewN1); in PerformORCombine_i1()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp15852 SDValue NewN1 = DAG.getNode(RISCVISD::CZERO_NEZ, DL, VT, FalseV.getOperand(0), in combineOrOfCZERO() local
15854 SDValue NewOr = DAG.getNode(ISD::OR, DL, VT, NewN0, NewN1); in combineOrOfCZERO()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp18819 SDValue NewN1 = DAG.getNode(N->getOperand(1).getOpcode(), DL, HalfVT, N1); in performVectorExtCombine() local
18820 SDValue NewOp = DAG.getNode(N->getOpcode(), DL, HalfVT, NewN0, NewN1); in performVectorExtCombine()