| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankCombiner.cpp | 383 auto NewExt = B.buildAnyExt(ExtAmtTy, AmtReg); in applyCanonicalizeZextShiftAmt() local
386 auto And = B.buildAnd(ExtAmtTy, NewExt, Mask); in applyCanonicalizeZextShiftAmt()
389 MRI.setRegBank(NewExt.getReg(0), RB); in applyCanonicalizeZextShiftAmt()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 586 Value *NewExt = Builder.CreateExtractElement(VecCmp, Ext0->getIndexOperand()); in foldExtExtCmp() local
587 replaceValue(I, *NewExt); in foldExtExtCmp()
611 Value *NewExt = Builder.CreateExtractElement(VecBO, Ext0->getIndexOperand()); in foldExtExtBinop() local
612 replaceValue(I, *NewExt); in foldExtExtBinop()
1353 Value *NewExt = Builder.CreateExtractElement(VecLogic, CheapIndex); in foldExtractedCmps() local
1354 replaceValue(I, *NewExt); in foldExtractedCmps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2305 SDValue NewExt = DAG.getZExtOrTrunc(NewSRL, DL, VT); in foldMaskAndShiftToScale() local
2307 SDValue NewSHL = DAG.getNode(ISD::SHL, DL, VT, NewExt, NewSHLAmt); in foldMaskAndShiftToScale()
2316 insertDAGNode(DAG, N, NewExt); in foldMaskAndShiftToScale()
2323 AM.IndexReg = NewExt; in foldMaskAndShiftToScale()
2367 SDValue NewExt = DAG.getZExtOrTrunc(NewAnd, DL, VT); in foldMaskedShiftToBEXTR() local
2369 SDValue NewSHL = DAG.getNode(ISD::SHL, DL, VT, NewExt, NewSHLAmt); in foldMaskedShiftToBEXTR()
2380 insertDAGNode(DAG, N, NewExt); in foldMaskedShiftToBEXTR()
2387 AM.IndexReg = NewExt; in foldMaskedShiftToBEXTR()
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| H A D | X86ISelLowering.cpp | 47189 SDValue NewExt = in combineExtractVectorElt() local
47191 return DAG.getAnyExtOrTrunc(NewExt, dl, VT); in combineExtractVectorElt()
55659 SDValue NewExt = DAG.getNode(Ext->getOpcode(), SDLoc(Ext), VT, AddOp0); in promoteExtBeforeAdd() local
55667 return DAG.getNode(ISD::ADD, SDLoc(Add), VT, NewExt, NewConstant, Flags); in promoteExtBeforeAdd()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 772 auto *NewExt = ExtractElementInst::Create(WideVec, OldExt->getOperand(1)); in replaceExtractElements() local
773 IC.InsertNewInstWith(NewExt, OldExt->getIterator()); in replaceExtractElements()
774 IC.replaceInstUsesWith(*OldExt, NewExt); in replaceExtractElements()
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| H A D | InstCombineShifts.cpp | 416 Value *NewExt = Builder.CreateZExt(Y, Ty, Op1->getName()); in commonShiftTransforms() local
417 return BinaryOperator::Create(I.getOpcode(), Op0, NewExt); in commonShiftTransforms()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1957 Register NewExt = MRI.createVirtualRegister(&AVR::GPR8RegClass); in insertMultibyteShift() local
1958 BuildMI(*BB, MI, dl, TII.get(AVR::ADCRdRr), NewExt) in insertMultibyteShift()
1961 HighByte = NewExt; in insertMultibyteShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 3118 SDValue NewExt = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt() local
3122 NewExt); in tryInsertVectorElt()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1845 SDValue NewExt = TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, in SimplifyDemandedBits() local
1848 Op, TLO.DAG.getNode(ISD::SHL, dl, VT, NewExt, NewSA)); in SimplifyDemandedBits()
1929 SDValue NewExt = in SimplifyDemandedBits() local
1931 return TLO.CombineTo(Op, NewExt); in SimplifyDemandedBits()
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| H A D | DAGCombiner.cpp | 7488 if (SDValue NewExt = DAG.FoldConstantArithmetic(ExtOpc, DL, VT, in visitAND() local
7491 DAG.FoldConstantArithmetic(ISD::AND, DL, VT, {N1, NewExt})) { in visitAND()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4252 auto NewExt = Builder.buildExtOrTrunc(ExtMI->getOpcode(), ExtTy, SrcReg); in applyExtendThroughPhis() local
4253 OldToNewSrcMap[SrcMI] = NewExt; in applyExtendThroughPhis()
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| H A D | LegalizerHelper.cpp | 7410 auto NewExt = MIRBuilder.buildInstr(MI.getOpcode(), {MidTy}, {Src}); in lowerEXT() local
7414 auto UnmergeSrc = MIRBuilder.buildUnmerge(EltTy, NewExt); in lowerEXT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 16315 SDValue NewExt = DAG.getNode(N0->getOpcode(), DL, NewVT, N0->ops()); in narrowIndex() local
16317 N = DAG.getNode(ISD::SHL, DL, NewVT, NewExt, NewShAmtVec); in narrowIndex()
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